Loading drivers/net/via-velocity.c +80 −95 Original line number Original line Diff line number Diff line Loading @@ -61,9 +61,9 @@ #include <linux/interrupt.h> #include <linux/interrupt.h> #include <linux/string.h> #include <linux/string.h> #include <linux/wait.h> #include <linux/wait.h> #include <asm/io.h> #include <linux/io.h> #include <linux/if.h> #include <linux/if.h> #include <asm/uaccess.h> #include <linux/uaccess.h> #include <linux/proc_fs.h> #include <linux/proc_fs.h> #include <linux/inetdevice.h> #include <linux/inetdevice.h> #include <linux/reboot.h> #include <linux/reboot.h> Loading @@ -81,7 +81,7 @@ #include "via-velocity.h" #include "via-velocity.h" static int velocity_nics = 0; static int velocity_nics; static int msglevel = MSG_LEVEL_INFO; static int msglevel = MSG_LEVEL_INFO; /** /** Loading Loading @@ -111,7 +111,6 @@ static void mac_get_cam_mask(struct mac_regs __iomem * regs, u8 * mask) /* Select mar */ /* Select mar */ BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, ®s->CAMCR); BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, ®s->CAMCR); } } Loading @@ -131,9 +130,9 @@ static void mac_set_cam_mask(struct mac_regs __iomem * regs, u8 * mask) writeb(CAMADDR_CAMEN, ®s->CAMADDR); writeb(CAMADDR_CAMEN, ®s->CAMADDR); for (i = 0; i < 8; i++) { for (i = 0; i < 8; i++) writeb(*mask++, &(regs->MARCAM[i])); writeb(*mask++, &(regs->MARCAM[i])); } /* disable CAMEN */ /* disable CAMEN */ writeb(0, ®s->CAMADDR); writeb(0, ®s->CAMADDR); Loading @@ -149,9 +148,9 @@ static void mac_set_vlan_cam_mask(struct mac_regs __iomem * regs, u8 * mask) writeb(CAMADDR_CAMEN | CAMADDR_VCAMSL, ®s->CAMADDR); writeb(CAMADDR_CAMEN | CAMADDR_VCAMSL, ®s->CAMADDR); for (i = 0; i < 8; i++) { for (i = 0; i < 8; i++) writeb(*mask++, &(regs->MARCAM[i])); writeb(*mask++, &(regs->MARCAM[i])); } /* disable CAMEN */ /* disable CAMEN */ writeb(0, ®s->CAMADDR); writeb(0, ®s->CAMADDR); Loading Loading @@ -179,9 +178,9 @@ static void mac_set_cam(struct mac_regs __iomem * regs, int idx, const u8 *addr) writeb(CAMADDR_CAMEN | idx, ®s->CAMADDR); writeb(CAMADDR_CAMEN | idx, ®s->CAMADDR); for (i = 0; i < 6; i++) { for (i = 0; i < 6; i++) writeb(*addr++, &(regs->MARCAM[i])); writeb(*addr++, &(regs->MARCAM[i])); } BYTE_REG_BITS_ON(CAMCR_CAMWR, ®s->CAMCR); BYTE_REG_BITS_ON(CAMCR_CAMWR, ®s->CAMCR); udelay(10); udelay(10); Loading Loading @@ -750,9 +749,9 @@ static void velocity_init_registers(struct velocity_info *vptr, mdelay(5); mdelay(5); mac_eeprom_reload(regs); mac_eeprom_reload(regs); for (i = 0; i < 6; i++) { for (i = 0; i < 6; i++) writeb(vptr->dev->dev_addr[i], &(regs->PAR[i])); writeb(vptr->dev->dev_addr[i], &(regs->PAR[i])); } /* /* * clear Pre_ACPI bit. * clear Pre_ACPI bit. */ */ Loading Loading @@ -1335,8 +1334,7 @@ static void velocity_free_td_ring_entry(struct velocity_info *vptr, return; return; if (td_info->skb) { if (td_info->skb) { for (i = 0; i < td_info->nskb_dma; i++) for (i = 0; i < td_info->nskb_dma; i++) { { if (td_info->skb_dma[i]) { if (td_info->skb_dma[i]) { pci_unmap_single(vptr->pdev, td_info->skb_dma[i], pci_unmap_single(vptr->pdev, td_info->skb_dma[i], td_info->skb->len, PCI_DMA_TODEVICE); td_info->skb->len, PCI_DMA_TODEVICE); Loading @@ -1363,10 +1361,9 @@ static void velocity_free_td_ring(struct velocity_info *vptr) for (j = 0; j < vptr->tx.numq; j++) { for (j = 0; j < vptr->tx.numq; j++) { if (vptr->tx.infos[j] == NULL) if (vptr->tx.infos[j] == NULL) continue; continue; for (i = 0; i < vptr->options.numtx; i++) { for (i = 0; i < vptr->options.numtx; i++) velocity_free_td_ring_entry(vptr, j, i); velocity_free_td_ring_entry(vptr, j, i); } kfree(vptr->tx.infos[j]); kfree(vptr->tx.infos[j]); vptr->tx.infos[j] = NULL; vptr->tx.infos[j] = NULL; } } Loading Loading @@ -1447,10 +1444,9 @@ static inline void velocity_rx_csum(struct rx_desc *rd, struct sk_buff *skb) if (rd->rdesc1.CSM & CSM_IPOK) { if (rd->rdesc1.CSM & CSM_IPOK) { if ((rd->rdesc1.CSM & CSM_TCPKT) || if ((rd->rdesc1.CSM & CSM_TCPKT) || (rd->rdesc1.CSM & CSM_UDPKT)) { (rd->rdesc1.CSM & CSM_UDPKT)) { if (!(rd->rdesc1.CSM & CSM_TUPOK)) { if (!(rd->rdesc1.CSM & CSM_TUPOK)) return; return; } } } skb->ip_summed = CHECKSUM_UNNECESSARY; skb->ip_summed = CHECKSUM_UNNECESSARY; } } } } Loading Loading @@ -1671,10 +1667,9 @@ static int velocity_tx_srv(struct velocity_info *vptr, u32 status) } } vptr->tx.tail[qnum] = idx; vptr->tx.tail[qnum] = idx; if (AVAIL_TD(vptr, qnum) < 1) { if (AVAIL_TD(vptr, qnum) < 1) full = 1; full = 1; } } } /* /* * Look to see if we should kick the transmit network * Look to see if we should kick the transmit network * layer for more work. * layer for more work. Loading Loading @@ -1783,12 +1778,11 @@ static void velocity_error(struct velocity_info *vptr, int status) /* /* * Only enable CD heart beat counter in 10HD mode * Only enable CD heart beat counter in 10HD mode */ */ if (!(vptr->mii_status & VELOCITY_DUPLEX_FULL) && (vptr->mii_status & VELOCITY_SPEED_10)) { if (!(vptr->mii_status & VELOCITY_DUPLEX_FULL) && (vptr->mii_status & VELOCITY_SPEED_10)) BYTE_REG_BITS_OFF(TESTCFG_HBDIS, ®s->TESTCFG); BYTE_REG_BITS_OFF(TESTCFG_HBDIS, ®s->TESTCFG); } else { else BYTE_REG_BITS_ON(TESTCFG_HBDIS, ®s->TESTCFG); BYTE_REG_BITS_ON(TESTCFG_HBDIS, ®s->TESTCFG); } } } /* /* * Get link status from PHYSR0 * Get link status from PHYSR0 */ */ Loading Loading @@ -2195,8 +2189,7 @@ static irqreturn_t velocity_intr(int irq, void *dev_instance) if (isr_status & (ISR_PTXI | ISR_PPTXI)) if (isr_status & (ISR_PTXI | ISR_PPTXI)) max_count += velocity_tx_srv(vptr, isr_status); max_count += velocity_tx_srv(vptr, isr_status); isr_status = mac_read_isr(vptr->mac_regs); isr_status = mac_read_isr(vptr->mac_regs); if (max_count > vptr->options.int_works) if (max_count > vptr->options.int_works) { { printk(KERN_WARNING "%s: excessive work at interrupt.\n", printk(KERN_WARNING "%s: excessive work at interrupt.\n", dev->name); dev->name); max_count = 0; max_count = 0; Loading Loading @@ -2717,9 +2710,8 @@ static int velocity_set_media_mode(struct velocity_info *vptr, u32 mii_status) } } */ */ if (PHYID_GET_PHY_ID(vptr->phy_id) == PHYID_CICADA_CS8201) { if (PHYID_GET_PHY_ID(vptr->phy_id) == PHYID_CICADA_CS8201) MII_REG_BITS_ON(AUXCR_MDPPS, MII_REG_AUXCR, vptr->mac_regs); MII_REG_BITS_ON(AUXCR_MDPPS, MII_REG_AUXCR, vptr->mac_regs); } /* /* * If connection type is AUTO * If connection type is AUTO Loading Loading @@ -2768,11 +2760,11 @@ static int velocity_set_media_mode(struct velocity_info *vptr, u32 mii_status) MII_REG_BITS_OFF(G1000CR_1000FD | G1000CR_1000, MII_REG_G1000CR, vptr->mac_regs); MII_REG_BITS_OFF(G1000CR_1000FD | G1000CR_1000, MII_REG_G1000CR, vptr->mac_regs); if (!(mii_status & VELOCITY_DUPLEX_FULL) && (mii_status & VELOCITY_SPEED_10)) { if (!(mii_status & VELOCITY_DUPLEX_FULL) && (mii_status & VELOCITY_SPEED_10)) BYTE_REG_BITS_OFF(TESTCFG_HBDIS, ®s->TESTCFG); BYTE_REG_BITS_OFF(TESTCFG_HBDIS, ®s->TESTCFG); } else { else BYTE_REG_BITS_ON(TESTCFG_HBDIS, ®s->TESTCFG); BYTE_REG_BITS_ON(TESTCFG_HBDIS, ®s->TESTCFG); } /* MII_REG_BITS_OFF(BMCR_SPEED1G, MII_REG_BMCR, vptr->mac_regs); */ /* MII_REG_BITS_OFF(BMCR_SPEED1G, MII_REG_BMCR, vptr->mac_regs); */ velocity_mii_read(vptr->mac_regs, MII_REG_ANAR, &ANAR); velocity_mii_read(vptr->mac_regs, MII_REG_ANAR, &ANAR); ANAR &= (~(ANAR_TXFD | ANAR_TX | ANAR_10FD | ANAR_10)); ANAR &= (~(ANAR_TXFD | ANAR_TX | ANAR_10FD | ANAR_10)); Loading Loading @@ -3192,9 +3184,8 @@ static void velocity_restore_context(struct velocity_info *vptr, struct velocity int i; int i; u8 __iomem *ptr = (u8 __iomem *)regs; u8 __iomem *ptr = (u8 __iomem *)regs; for (i = MAC_REG_PAR; i < MAC_REG_CR0_SET; i += 4) { for (i = MAC_REG_PAR; i < MAC_REG_CR0_SET; i += 4) writel(*((u32 *) (context->mac_reg + i)), ptr + i); writel(*((u32 *) (context->mac_reg + i)), ptr + i); } /* Just skip cr0 */ /* Just skip cr0 */ for (i = MAC_REG_CR1_SET; i < MAC_REG_CR0_CLR; i++) { for (i = MAC_REG_CR1_SET; i < MAC_REG_CR0_CLR; i++) { Loading @@ -3204,20 +3195,16 @@ static void velocity_restore_context(struct velocity_info *vptr, struct velocity writeb(*((u8 *) (context->mac_reg + i)), ptr + i); writeb(*((u8 *) (context->mac_reg + i)), ptr + i); } } for (i = MAC_REG_MAR; i < MAC_REG_IMR; i += 4) { for (i = MAC_REG_MAR; i < MAC_REG_IMR; i += 4) writel(*((u32 *) (context->mac_reg + i)), ptr + i); writel(*((u32 *) (context->mac_reg + i)), ptr + i); } for (i = MAC_REG_RDBASE_LO; i < MAC_REG_FIFO_TEST0; i += 4) { for (i = MAC_REG_RDBASE_LO; i < MAC_REG_FIFO_TEST0; i += 4) writel(*((u32 *) (context->mac_reg + i)), ptr + i); writel(*((u32 *) (context->mac_reg + i)), ptr + i); } for (i = MAC_REG_TDCSR_SET; i <= MAC_REG_RDCSR_SET; i++) { for (i = MAC_REG_TDCSR_SET; i <= MAC_REG_RDCSR_SET; i++) writeb(*((u8 *) (context->mac_reg + i)), ptr + i); writeb(*((u8 *) (context->mac_reg + i)), ptr + i); } } } /** /** * wol_calc_crc - WOL CRC * wol_calc_crc - WOL CRC * @pattern: data pattern * @pattern: data pattern Loading Loading @@ -3284,9 +3271,8 @@ static int velocity_set_wol(struct velocity_info *vptr) writew((WOLCR_LINKON_EN|WOLCR_LINKOFF_EN), ®s->WOLCRSet); writew((WOLCR_LINKON_EN|WOLCR_LINKOFF_EN), ®s->WOLCRSet); */ */ if (vptr->wol_opts & VELOCITY_WOL_UCAST) { if (vptr->wol_opts & VELOCITY_WOL_UCAST) writew(WOLCR_UNICAST_EN, ®s->WOLCRSet); writew(WOLCR_UNICAST_EN, ®s->WOLCRSet); } if (vptr->wol_opts & VELOCITY_WOL_ARP) { if (vptr->wol_opts & VELOCITY_WOL_ARP) { struct arp_packet *arp = (struct arp_packet *) buf; struct arp_packet *arp = (struct arp_packet *) buf; Loading Loading @@ -3399,10 +3385,9 @@ static int velocity_resume(struct pci_dev *pdev) velocity_tx_srv(vptr, 0); velocity_tx_srv(vptr, 0); for (i = 0; i < vptr->tx.numq; i++) { for (i = 0; i < vptr->tx.numq; i++) { if (vptr->tx.used[i]) { if (vptr->tx.used[i]) mac_tx_queue_wake(vptr->mac_regs, i); mac_tx_queue_wake(vptr->mac_regs, i); } } } mac_enable_int(vptr->mac_regs); mac_enable_int(vptr->mac_regs); spin_unlock_irqrestore(&vptr->lock, flags); spin_unlock_irqrestore(&vptr->lock, flags); Loading Loading
drivers/net/via-velocity.c +80 −95 Original line number Original line Diff line number Diff line Loading @@ -61,9 +61,9 @@ #include <linux/interrupt.h> #include <linux/interrupt.h> #include <linux/string.h> #include <linux/string.h> #include <linux/wait.h> #include <linux/wait.h> #include <asm/io.h> #include <linux/io.h> #include <linux/if.h> #include <linux/if.h> #include <asm/uaccess.h> #include <linux/uaccess.h> #include <linux/proc_fs.h> #include <linux/proc_fs.h> #include <linux/inetdevice.h> #include <linux/inetdevice.h> #include <linux/reboot.h> #include <linux/reboot.h> Loading @@ -81,7 +81,7 @@ #include "via-velocity.h" #include "via-velocity.h" static int velocity_nics = 0; static int velocity_nics; static int msglevel = MSG_LEVEL_INFO; static int msglevel = MSG_LEVEL_INFO; /** /** Loading Loading @@ -111,7 +111,6 @@ static void mac_get_cam_mask(struct mac_regs __iomem * regs, u8 * mask) /* Select mar */ /* Select mar */ BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, ®s->CAMCR); BYTE_REG_BITS_SET(CAMCR_PS_MAR, CAMCR_PS1 | CAMCR_PS0, ®s->CAMCR); } } Loading @@ -131,9 +130,9 @@ static void mac_set_cam_mask(struct mac_regs __iomem * regs, u8 * mask) writeb(CAMADDR_CAMEN, ®s->CAMADDR); writeb(CAMADDR_CAMEN, ®s->CAMADDR); for (i = 0; i < 8; i++) { for (i = 0; i < 8; i++) writeb(*mask++, &(regs->MARCAM[i])); writeb(*mask++, &(regs->MARCAM[i])); } /* disable CAMEN */ /* disable CAMEN */ writeb(0, ®s->CAMADDR); writeb(0, ®s->CAMADDR); Loading @@ -149,9 +148,9 @@ static void mac_set_vlan_cam_mask(struct mac_regs __iomem * regs, u8 * mask) writeb(CAMADDR_CAMEN | CAMADDR_VCAMSL, ®s->CAMADDR); writeb(CAMADDR_CAMEN | CAMADDR_VCAMSL, ®s->CAMADDR); for (i = 0; i < 8; i++) { for (i = 0; i < 8; i++) writeb(*mask++, &(regs->MARCAM[i])); writeb(*mask++, &(regs->MARCAM[i])); } /* disable CAMEN */ /* disable CAMEN */ writeb(0, ®s->CAMADDR); writeb(0, ®s->CAMADDR); Loading Loading @@ -179,9 +178,9 @@ static void mac_set_cam(struct mac_regs __iomem * regs, int idx, const u8 *addr) writeb(CAMADDR_CAMEN | idx, ®s->CAMADDR); writeb(CAMADDR_CAMEN | idx, ®s->CAMADDR); for (i = 0; i < 6; i++) { for (i = 0; i < 6; i++) writeb(*addr++, &(regs->MARCAM[i])); writeb(*addr++, &(regs->MARCAM[i])); } BYTE_REG_BITS_ON(CAMCR_CAMWR, ®s->CAMCR); BYTE_REG_BITS_ON(CAMCR_CAMWR, ®s->CAMCR); udelay(10); udelay(10); Loading Loading @@ -750,9 +749,9 @@ static void velocity_init_registers(struct velocity_info *vptr, mdelay(5); mdelay(5); mac_eeprom_reload(regs); mac_eeprom_reload(regs); for (i = 0; i < 6; i++) { for (i = 0; i < 6; i++) writeb(vptr->dev->dev_addr[i], &(regs->PAR[i])); writeb(vptr->dev->dev_addr[i], &(regs->PAR[i])); } /* /* * clear Pre_ACPI bit. * clear Pre_ACPI bit. */ */ Loading Loading @@ -1335,8 +1334,7 @@ static void velocity_free_td_ring_entry(struct velocity_info *vptr, return; return; if (td_info->skb) { if (td_info->skb) { for (i = 0; i < td_info->nskb_dma; i++) for (i = 0; i < td_info->nskb_dma; i++) { { if (td_info->skb_dma[i]) { if (td_info->skb_dma[i]) { pci_unmap_single(vptr->pdev, td_info->skb_dma[i], pci_unmap_single(vptr->pdev, td_info->skb_dma[i], td_info->skb->len, PCI_DMA_TODEVICE); td_info->skb->len, PCI_DMA_TODEVICE); Loading @@ -1363,10 +1361,9 @@ static void velocity_free_td_ring(struct velocity_info *vptr) for (j = 0; j < vptr->tx.numq; j++) { for (j = 0; j < vptr->tx.numq; j++) { if (vptr->tx.infos[j] == NULL) if (vptr->tx.infos[j] == NULL) continue; continue; for (i = 0; i < vptr->options.numtx; i++) { for (i = 0; i < vptr->options.numtx; i++) velocity_free_td_ring_entry(vptr, j, i); velocity_free_td_ring_entry(vptr, j, i); } kfree(vptr->tx.infos[j]); kfree(vptr->tx.infos[j]); vptr->tx.infos[j] = NULL; vptr->tx.infos[j] = NULL; } } Loading Loading @@ -1447,10 +1444,9 @@ static inline void velocity_rx_csum(struct rx_desc *rd, struct sk_buff *skb) if (rd->rdesc1.CSM & CSM_IPOK) { if (rd->rdesc1.CSM & CSM_IPOK) { if ((rd->rdesc1.CSM & CSM_TCPKT) || if ((rd->rdesc1.CSM & CSM_TCPKT) || (rd->rdesc1.CSM & CSM_UDPKT)) { (rd->rdesc1.CSM & CSM_UDPKT)) { if (!(rd->rdesc1.CSM & CSM_TUPOK)) { if (!(rd->rdesc1.CSM & CSM_TUPOK)) return; return; } } } skb->ip_summed = CHECKSUM_UNNECESSARY; skb->ip_summed = CHECKSUM_UNNECESSARY; } } } } Loading Loading @@ -1671,10 +1667,9 @@ static int velocity_tx_srv(struct velocity_info *vptr, u32 status) } } vptr->tx.tail[qnum] = idx; vptr->tx.tail[qnum] = idx; if (AVAIL_TD(vptr, qnum) < 1) { if (AVAIL_TD(vptr, qnum) < 1) full = 1; full = 1; } } } /* /* * Look to see if we should kick the transmit network * Look to see if we should kick the transmit network * layer for more work. * layer for more work. Loading Loading @@ -1783,12 +1778,11 @@ static void velocity_error(struct velocity_info *vptr, int status) /* /* * Only enable CD heart beat counter in 10HD mode * Only enable CD heart beat counter in 10HD mode */ */ if (!(vptr->mii_status & VELOCITY_DUPLEX_FULL) && (vptr->mii_status & VELOCITY_SPEED_10)) { if (!(vptr->mii_status & VELOCITY_DUPLEX_FULL) && (vptr->mii_status & VELOCITY_SPEED_10)) BYTE_REG_BITS_OFF(TESTCFG_HBDIS, ®s->TESTCFG); BYTE_REG_BITS_OFF(TESTCFG_HBDIS, ®s->TESTCFG); } else { else BYTE_REG_BITS_ON(TESTCFG_HBDIS, ®s->TESTCFG); BYTE_REG_BITS_ON(TESTCFG_HBDIS, ®s->TESTCFG); } } } /* /* * Get link status from PHYSR0 * Get link status from PHYSR0 */ */ Loading Loading @@ -2195,8 +2189,7 @@ static irqreturn_t velocity_intr(int irq, void *dev_instance) if (isr_status & (ISR_PTXI | ISR_PPTXI)) if (isr_status & (ISR_PTXI | ISR_PPTXI)) max_count += velocity_tx_srv(vptr, isr_status); max_count += velocity_tx_srv(vptr, isr_status); isr_status = mac_read_isr(vptr->mac_regs); isr_status = mac_read_isr(vptr->mac_regs); if (max_count > vptr->options.int_works) if (max_count > vptr->options.int_works) { { printk(KERN_WARNING "%s: excessive work at interrupt.\n", printk(KERN_WARNING "%s: excessive work at interrupt.\n", dev->name); dev->name); max_count = 0; max_count = 0; Loading Loading @@ -2717,9 +2710,8 @@ static int velocity_set_media_mode(struct velocity_info *vptr, u32 mii_status) } } */ */ if (PHYID_GET_PHY_ID(vptr->phy_id) == PHYID_CICADA_CS8201) { if (PHYID_GET_PHY_ID(vptr->phy_id) == PHYID_CICADA_CS8201) MII_REG_BITS_ON(AUXCR_MDPPS, MII_REG_AUXCR, vptr->mac_regs); MII_REG_BITS_ON(AUXCR_MDPPS, MII_REG_AUXCR, vptr->mac_regs); } /* /* * If connection type is AUTO * If connection type is AUTO Loading Loading @@ -2768,11 +2760,11 @@ static int velocity_set_media_mode(struct velocity_info *vptr, u32 mii_status) MII_REG_BITS_OFF(G1000CR_1000FD | G1000CR_1000, MII_REG_G1000CR, vptr->mac_regs); MII_REG_BITS_OFF(G1000CR_1000FD | G1000CR_1000, MII_REG_G1000CR, vptr->mac_regs); if (!(mii_status & VELOCITY_DUPLEX_FULL) && (mii_status & VELOCITY_SPEED_10)) { if (!(mii_status & VELOCITY_DUPLEX_FULL) && (mii_status & VELOCITY_SPEED_10)) BYTE_REG_BITS_OFF(TESTCFG_HBDIS, ®s->TESTCFG); BYTE_REG_BITS_OFF(TESTCFG_HBDIS, ®s->TESTCFG); } else { else BYTE_REG_BITS_ON(TESTCFG_HBDIS, ®s->TESTCFG); BYTE_REG_BITS_ON(TESTCFG_HBDIS, ®s->TESTCFG); } /* MII_REG_BITS_OFF(BMCR_SPEED1G, MII_REG_BMCR, vptr->mac_regs); */ /* MII_REG_BITS_OFF(BMCR_SPEED1G, MII_REG_BMCR, vptr->mac_regs); */ velocity_mii_read(vptr->mac_regs, MII_REG_ANAR, &ANAR); velocity_mii_read(vptr->mac_regs, MII_REG_ANAR, &ANAR); ANAR &= (~(ANAR_TXFD | ANAR_TX | ANAR_10FD | ANAR_10)); ANAR &= (~(ANAR_TXFD | ANAR_TX | ANAR_10FD | ANAR_10)); Loading Loading @@ -3192,9 +3184,8 @@ static void velocity_restore_context(struct velocity_info *vptr, struct velocity int i; int i; u8 __iomem *ptr = (u8 __iomem *)regs; u8 __iomem *ptr = (u8 __iomem *)regs; for (i = MAC_REG_PAR; i < MAC_REG_CR0_SET; i += 4) { for (i = MAC_REG_PAR; i < MAC_REG_CR0_SET; i += 4) writel(*((u32 *) (context->mac_reg + i)), ptr + i); writel(*((u32 *) (context->mac_reg + i)), ptr + i); } /* Just skip cr0 */ /* Just skip cr0 */ for (i = MAC_REG_CR1_SET; i < MAC_REG_CR0_CLR; i++) { for (i = MAC_REG_CR1_SET; i < MAC_REG_CR0_CLR; i++) { Loading @@ -3204,20 +3195,16 @@ static void velocity_restore_context(struct velocity_info *vptr, struct velocity writeb(*((u8 *) (context->mac_reg + i)), ptr + i); writeb(*((u8 *) (context->mac_reg + i)), ptr + i); } } for (i = MAC_REG_MAR; i < MAC_REG_IMR; i += 4) { for (i = MAC_REG_MAR; i < MAC_REG_IMR; i += 4) writel(*((u32 *) (context->mac_reg + i)), ptr + i); writel(*((u32 *) (context->mac_reg + i)), ptr + i); } for (i = MAC_REG_RDBASE_LO; i < MAC_REG_FIFO_TEST0; i += 4) { for (i = MAC_REG_RDBASE_LO; i < MAC_REG_FIFO_TEST0; i += 4) writel(*((u32 *) (context->mac_reg + i)), ptr + i); writel(*((u32 *) (context->mac_reg + i)), ptr + i); } for (i = MAC_REG_TDCSR_SET; i <= MAC_REG_RDCSR_SET; i++) { for (i = MAC_REG_TDCSR_SET; i <= MAC_REG_RDCSR_SET; i++) writeb(*((u8 *) (context->mac_reg + i)), ptr + i); writeb(*((u8 *) (context->mac_reg + i)), ptr + i); } } } /** /** * wol_calc_crc - WOL CRC * wol_calc_crc - WOL CRC * @pattern: data pattern * @pattern: data pattern Loading Loading @@ -3284,9 +3271,8 @@ static int velocity_set_wol(struct velocity_info *vptr) writew((WOLCR_LINKON_EN|WOLCR_LINKOFF_EN), ®s->WOLCRSet); writew((WOLCR_LINKON_EN|WOLCR_LINKOFF_EN), ®s->WOLCRSet); */ */ if (vptr->wol_opts & VELOCITY_WOL_UCAST) { if (vptr->wol_opts & VELOCITY_WOL_UCAST) writew(WOLCR_UNICAST_EN, ®s->WOLCRSet); writew(WOLCR_UNICAST_EN, ®s->WOLCRSet); } if (vptr->wol_opts & VELOCITY_WOL_ARP) { if (vptr->wol_opts & VELOCITY_WOL_ARP) { struct arp_packet *arp = (struct arp_packet *) buf; struct arp_packet *arp = (struct arp_packet *) buf; Loading Loading @@ -3399,10 +3385,9 @@ static int velocity_resume(struct pci_dev *pdev) velocity_tx_srv(vptr, 0); velocity_tx_srv(vptr, 0); for (i = 0; i < vptr->tx.numq; i++) { for (i = 0; i < vptr->tx.numq; i++) { if (vptr->tx.used[i]) { if (vptr->tx.used[i]) mac_tx_queue_wake(vptr->mac_regs, i); mac_tx_queue_wake(vptr->mac_regs, i); } } } mac_enable_int(vptr->mac_regs); mac_enable_int(vptr->mac_regs); spin_unlock_irqrestore(&vptr->lock, flags); spin_unlock_irqrestore(&vptr->lock, flags); Loading