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Commit c341376a authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'renesas-soc2-for-v4.8' of... 

Merge tag 'renesas-soc2-for-v4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/soc

Second Round of Renesas ARM Based SoC Updates for v4.8

* Add DT support to the APMU driver and prioritise DT APMU support
* Obtain extal frequency from DT
* Add support for r8a7792

* tag 'renesas-soc2-for-v4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas

:
  ARM: shmobile: r8a7791: Prioritize DT APMU support
  ARM: shmobile: r8a7790: Prioritize DT APMU support
  ARM: shmobile: smp: Add function to prioritize DT SMP
  ARM: shmobile: apmu: Add APMU DT support via Enable method
  ARM: shmobile: apmu: Move #ifdef CONFIG_SMP to cover more functions
  ARM: shmobile: rcar-gen2: Correct arch timer frequency on R-Car V2H
  ARM: shmobile: rcar-gen2: Obtain extal frequency from DT
  ARM: shmobile: r8a7792: basic SoC support
  soc: renesas: rcar-sysc: Improve SYSC interrupt config in legacy wrapper
  soc: renesas: rcar-sysc: Move SYSC interrupt config to rcar-sysc driver
  soc: renesas: rcar-sysc: Make rcar_sysc_init() init the PM domains
  soc: renesas: rcar-sysc: Fix uninitialized error code in rcar_sysc_pd_init()
  soc: renesas: rcar-sysc: add R8A7792 support
  soc: renesas: rcar-sysc: Add support for R-Car M3-W power areas
  soc: renesas: Add r8a7796 SYSC PM Domain Binding Definitions
  soc: renesas: rcar-sysc: Document r8a7796 support

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 8264dde5 f89a5170

Documentation/devicetree/bindings/power/renesas,rcar-sysc.txt

+1 −0
Original line number Diff line number Diff line
@@ -14,6 +14,7 @@ Required properties: 
      - "renesas,r8a7793-sysc" (R-Car M2-N)

      - "renesas,r8a7794-sysc" (R-Car E2)

      - "renesas,r8a7795-sysc" (R-Car H3)

      - "renesas,r8a7796-sysc" (R-Car M3-W)

  - reg: Address start and address range for the device.

  - #power-domain-cells: Must be 1.

arch/arm/mach-shmobile/Kconfig

+4 −0
Original line number Diff line number Diff line
@@ -86,6 +86,10 @@ config ARCH_R8A7791 
	select ARCH_RCAR_GEN2

	select I2C



config ARCH_R8A7792

	bool "R-Car V2H (R8A77920)"

	select ARCH_RCAR_GEN2



config ARCH_R8A7793

	bool "R-Car M2-N (R8A7793)"

	select ARCH_RCAR_GEN2

arch/arm/mach-shmobile/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -13,6 +13,7 @@ obj-$(CONFIG_ARCH_R8A7778) += setup-r8a7778.o 
obj-$(CONFIG_ARCH_R8A7779)	+= setup-r8a7779.o pm-r8a7779.o

obj-$(CONFIG_ARCH_R8A7790)	+= setup-r8a7790.o

obj-$(CONFIG_ARCH_R8A7791)	+= setup-r8a7791.o

obj-$(CONFIG_ARCH_R8A7792)	+= setup-r8a7792.o

obj-$(CONFIG_ARCH_R8A7793)	+= setup-r8a7793.o

obj-$(CONFIG_ARCH_R8A7794)	+= setup-r8a7794.o

obj-$(CONFIG_ARCH_EMEV2)	+= setup-emev2.o

arch/arm/mach-shmobile/common.h

+1 −0
Original line number Diff line number Diff line
@@ -10,6 +10,7 @@ extern void shmobile_smp_sleep(void); 
extern void shmobile_smp_hook(unsigned int cpu, unsigned long fn,

			      unsigned long arg);

extern bool shmobile_smp_cpu_can_disable(unsigned int cpu);

extern bool shmobile_smp_init_fallback_ops(void);

extern void shmobile_boot_scu(void);

extern void shmobile_smp_scu_prepare_cpus(phys_addr_t scu_base_phys,

					  unsigned int max_cpus);

arch/arm/mach-shmobile/platsmp-apmu.c

+89 −5
Original line number Diff line number Diff line
@@ -24,6 +24,7 @@ 
#include <asm/suspend.h>

#include "common.h"

#include "platsmp-apmu.h"

#include "rcar-gen2.h"



static struct {

	void __iomem *iomem;
@@ -74,6 +75,7 @@ static int __maybe_unused apmu_wrap(int cpu, int (*fn)(void __iomem *p, int cpu) 
	return p ? fn(p, apmu_cpus[cpu].bit) : -EINVAL;

}



#ifdef CONFIG_SMP

static void apmu_init_cpu(struct resource *res, int cpu, int bit)

{

	if ((cpu >= ARRAY_SIZE(apmu_cpus)) || apmu_cpus[cpu].iomem)
@@ -117,18 +119,69 @@ static void apmu_parse_cfg(void (*fn)(struct resource *res, int cpu, int bit), 
	}

}



void __init shmobile_smp_apmu_prepare_cpus(unsigned int max_cpus,

					   struct rcar_apmu_config *apmu_config,

					   int num)

static const struct of_device_id apmu_ids[] = {

	{ .compatible = "renesas,apmu" },

	{ /*sentinel*/ }

};



static void apmu_parse_dt(void (*fn)(struct resource *res, int cpu, int bit))

{

	struct device_node *np_apmu, *np_cpu;

	struct resource res;

	int bit, index;

	u32 id;



	for_each_matching_node(np_apmu, apmu_ids) {

		/* only enable the cluster that includes the boot CPU */

		bool is_allowed = false;



		for (bit = 0; bit < CONFIG_NR_CPUS; bit++) {

			np_cpu = of_parse_phandle(np_apmu, "cpus", bit);

			if (np_cpu) {

				if (!of_property_read_u32(np_cpu, "reg", &id)) {

					if (id == cpu_logical_map(0)) {

						is_allowed = true;

						of_node_put(np_cpu);

						break;

					}



				}

				of_node_put(np_cpu);

			}

		}

		if (!is_allowed)

			continue;



		for (bit = 0; bit < CONFIG_NR_CPUS; bit++) {

			np_cpu = of_parse_phandle(np_apmu, "cpus", bit);

			if (np_cpu) {

				if (!of_property_read_u32(np_cpu, "reg", &id)) {

					index = get_logical_index(id);

					if ((index >= 0) &&

					    !of_address_to_resource(np_apmu,

								    0, &res))

						fn(&res, index, bit);

				}

				of_node_put(np_cpu);

			}

		}

	}

}



static void __init shmobile_smp_apmu_setup_boot(void)

{

	/* install boot code shared by all CPUs */

	shmobile_boot_fn = virt_to_phys(shmobile_smp_boot);

}



	/* perform per-cpu setup */

void __init shmobile_smp_apmu_prepare_cpus(unsigned int max_cpus,

					   struct rcar_apmu_config *apmu_config,

					   int num)

{

	shmobile_smp_apmu_setup_boot();

	apmu_parse_cfg(apmu_init_cpu, apmu_config, num);

}



#ifdef CONFIG_SMP

int shmobile_smp_apmu_boot_secondary(unsigned int cpu, struct task_struct *idle)

{

	/* For this particular CPU register boot vector */
@@ -136,7 +189,38 @@ int shmobile_smp_apmu_boot_secondary(unsigned int cpu, struct task_struct *idle) 


	return apmu_wrap(cpu, apmu_power_on);

}



static void __init shmobile_smp_apmu_prepare_cpus_dt(unsigned int max_cpus)

{

	shmobile_smp_apmu_setup_boot();

	apmu_parse_dt(apmu_init_cpu);

	rcar_gen2_pm_init();

}



static int shmobile_smp_apmu_boot_secondary_md21(unsigned int cpu,

						 struct task_struct *idle)

{

	/* Error out when hardware debug mode is enabled */

	if (rcar_gen2_read_mode_pins() & BIT(21)) {

		pr_warn("Unable to boot CPU%u when MD21 is set\n", cpu);

		return -ENOTSUPP;

	}



	return shmobile_smp_apmu_boot_secondary(cpu, idle);

}



static struct smp_operations apmu_smp_ops __initdata = {

	.smp_prepare_cpus	= shmobile_smp_apmu_prepare_cpus_dt,

	.smp_boot_secondary	= shmobile_smp_apmu_boot_secondary_md21,

#ifdef CONFIG_HOTPLUG_CPU

	.cpu_can_disable	= shmobile_smp_cpu_can_disable,

	.cpu_die		= shmobile_smp_apmu_cpu_die,

	.cpu_kill		= shmobile_smp_apmu_cpu_kill,

#endif

};



CPU_METHOD_OF_DECLARE(shmobile_smp_apmu, "renesas,apmu", &apmu_smp_ops);

#endif /* CONFIG_SMP */



#if defined(CONFIG_HOTPLUG_CPU) || defined(CONFIG_SUSPEND)

/* nicked from arch/arm/mach-exynos/hotplug.c */