Loading drivers/gpu/msm/kgsl_pwrctrl.c +41 −0 Original line number Diff line number Diff line Loading @@ -2124,6 +2124,45 @@ static inline void _close_clks(struct kgsl_device *device) devm_clk_put(&device->pdev->dev, pwr->gpu_bimc_int_clk); } static bool _gpu_freq_supported(struct kgsl_pwrctrl *pwr, unsigned int freq) { int i; for (i = pwr->num_pwrlevels - 2; i >= 0; i--) { if (pwr->pwrlevels[i].gpu_freq == freq) return true; } return false; } static void kgsl_pwrctrl_disable_unused_opp(struct kgsl_device *device) { struct device *dev = &device->pdev->dev; struct dev_pm_opp *opp; unsigned long freq = 0; int ret; ret = dev_pm_opp_get_opp_count(dev); /* Return early, If no OPP table or OPP count is zero */ if (ret <= 0) return; while (1) { rcu_read_lock(); opp = dev_pm_opp_find_freq_ceil(dev, &freq); rcu_read_unlock(); if (IS_ERR(opp)) break; if (!_gpu_freq_supported(&device->pwrctrl, freq)) dev_pm_opp_disable(dev, freq); freq++; } } int kgsl_pwrctrl_init(struct kgsl_device *device) { int i, k, m, n = 0, result; Loading Loading @@ -2181,6 +2220,8 @@ int kgsl_pwrctrl_init(struct kgsl_device *device) pwr->pwrlevels[i].gpu_freq = freq; } kgsl_pwrctrl_disable_unused_opp(device); kgsl_clk_set_rate(device, pwr->num_pwrlevels - 1); clk_set_rate(pwr->grp_clks[6], Loading Loading
drivers/gpu/msm/kgsl_pwrctrl.c +41 −0 Original line number Diff line number Diff line Loading @@ -2124,6 +2124,45 @@ static inline void _close_clks(struct kgsl_device *device) devm_clk_put(&device->pdev->dev, pwr->gpu_bimc_int_clk); } static bool _gpu_freq_supported(struct kgsl_pwrctrl *pwr, unsigned int freq) { int i; for (i = pwr->num_pwrlevels - 2; i >= 0; i--) { if (pwr->pwrlevels[i].gpu_freq == freq) return true; } return false; } static void kgsl_pwrctrl_disable_unused_opp(struct kgsl_device *device) { struct device *dev = &device->pdev->dev; struct dev_pm_opp *opp; unsigned long freq = 0; int ret; ret = dev_pm_opp_get_opp_count(dev); /* Return early, If no OPP table or OPP count is zero */ if (ret <= 0) return; while (1) { rcu_read_lock(); opp = dev_pm_opp_find_freq_ceil(dev, &freq); rcu_read_unlock(); if (IS_ERR(opp)) break; if (!_gpu_freq_supported(&device->pwrctrl, freq)) dev_pm_opp_disable(dev, freq); freq++; } } int kgsl_pwrctrl_init(struct kgsl_device *device) { int i, k, m, n = 0, result; Loading Loading @@ -2181,6 +2220,8 @@ int kgsl_pwrctrl_init(struct kgsl_device *device) pwr->pwrlevels[i].gpu_freq = freq; } kgsl_pwrctrl_disable_unused_opp(device); kgsl_clk_set_rate(device, pwr->num_pwrlevels - 1); clk_set_rate(pwr->grp_clks[6], Loading