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Commit c2499d68 authored by Arnd Bergmann's avatar Arnd Bergmann
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Merge tag 'renesas-rcar-sysc-for-v4.7' of...

Merge tag 'renesas-rcar-sysc-for-v4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt

Pull "Renesas ARM Based SoC R-Car SYSC Updates for v4.7" from Simon Horman:

* Add DT bindings for the R-Car System Controller.
  An implementation is intended to follow.

* tag 'renesas-rcar-sysc-for-v4.7' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
  soc: renesas: Add r8a7795 SYSC PM Domain Binding Definitions
  soc: renesas: Add r8a7794 SYSC PM Domain Binding Definitions
  soc: renesas: Add r8a7793 SYSC PM Domain Binding Definitions
  soc: renesas: Add r8a7791 SYSC PM Domain Binding Definitions
  soc: renesas: Add r8a7790 SYSC PM Domain Binding Definitions
  soc: renesas: Add r8a7779 SYSC PM Domain Binding Definitions
  PM / Domains: Add DT bindings for the R-Car System Controller
parents 62547ba3 839a04d8
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DT bindings for the Renesas R-Car System Controller

== System Controller Node ==

The R-Car System Controller provides power management for the CPU cores and
various coprocessors.

Required properties:
  - compatible: Must contain exactly one of the following:
      - "renesas,r8a7779-sysc" (R-Car H1)
      - "renesas,r8a7790-sysc" (R-Car H2)
      - "renesas,r8a7791-sysc" (R-Car M2-W)
      - "renesas,r8a7792-sysc" (R-Car V2H)
      - "renesas,r8a7793-sysc" (R-Car M2-N)
      - "renesas,r8a7794-sysc" (R-Car E2)
      - "renesas,r8a7795-sysc" (R-Car H3)
  - reg: Address start and address range for the device.
  - #power-domain-cells: Must be 1.


Example:

	sysc: system-controller@e6180000 {
		compatible = "renesas,r8a7791-sysc";
		reg = <0 0xe6180000 0 0x0200>;
		#power-domain-cells = <1>;
	};


== PM Domain Consumers ==

Devices residing in a power area must refer to that power area, as documented
by the generic PM domain bindings in
Documentation/devicetree/bindings/power/power_domain.txt.

Required properties:
  - power-domains: A phandle and symbolic PM domain specifier, as defined in
		   <dt-bindings/power/r8a77*-sysc.h>.


Example:

	L2_CA15: cache-controller@0 {
		compatible = "cache";
		power-domains = <&sysc R8A7791_PD_CA15_SCU>;
		cache-unified;
		cache-level = <2>;
	};
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/*
 * Copyright (C) 2016 Glider bvba
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; version 2 of the License.
 */
#ifndef __DT_BINDINGS_POWER_R8A7779_SYSC_H__
#define __DT_BINDINGS_POWER_R8A7779_SYSC_H__

/*
 * These power domain indices match the numbers of the interrupt bits
 * representing the power areas in the various Interrupt Registers
 * (e.g. SYSCISR, Interrupt Status Register)
 */

#define R8A7779_PD_ARM1			 1
#define R8A7779_PD_ARM2			 2
#define R8A7779_PD_ARM3			 3
#define R8A7779_PD_SGX			20
#define R8A7779_PD_VDP			21
#define R8A7779_PD_IMP			24

/* Always-on power area */
#define R8A7779_PD_ALWAYS_ON		32

#endif /* __DT_BINDINGS_POWER_R8A7779_SYSC_H__ */
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/*
 * Copyright (C) 2016 Glider bvba
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; version 2 of the License.
 */
#ifndef __DT_BINDINGS_POWER_R8A7790_SYSC_H__
#define __DT_BINDINGS_POWER_R8A7790_SYSC_H__

/*
 * These power domain indices match the numbers of the interrupt bits
 * representing the power areas in the various Interrupt Registers
 * (e.g. SYSCISR, Interrupt Status Register)
 */

#define R8A7790_PD_CA15_CPU0		 0
#define R8A7790_PD_CA15_CPU1		 1
#define R8A7790_PD_CA15_CPU2		 2
#define R8A7790_PD_CA15_CPU3		 3
#define R8A7790_PD_CA7_CPU0		 5
#define R8A7790_PD_CA7_CPU1		 6
#define R8A7790_PD_CA7_CPU2		 7
#define R8A7790_PD_CA7_CPU3		 8
#define R8A7790_PD_CA15_SCU		12
#define R8A7790_PD_SH_4A		16
#define R8A7790_PD_RGX			20
#define R8A7790_PD_CA7_SCU		21
#define R8A7790_PD_IMP			24

/* Always-on power area */
#define R8A7790_PD_ALWAYS_ON		32

#endif /* __DT_BINDINGS_POWER_R8A7790_SYSC_H__ */
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/*
 * Copyright (C) 2016 Glider bvba
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; version 2 of the License.
 */
#ifndef __DT_BINDINGS_POWER_R8A7791_SYSC_H__
#define __DT_BINDINGS_POWER_R8A7791_SYSC_H__

/*
 * These power domain indices match the numbers of the interrupt bits
 * representing the power areas in the various Interrupt Registers
 * (e.g. SYSCISR, Interrupt Status Register)
 */

#define R8A7791_PD_CA15_CPU0		 0
#define R8A7791_PD_CA15_CPU1		 1
#define R8A7791_PD_CA15_SCU		12
#define R8A7791_PD_SH_4A		16
#define R8A7791_PD_SGX			20

/* Always-on power area */
#define R8A7791_PD_ALWAYS_ON		32

#endif /* __DT_BINDINGS_POWER_R8A7791_SYSC_H__ */
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/*
 * Copyright (C) 2016 Glider bvba
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; version 2 of the License.
 */
#ifndef __DT_BINDINGS_POWER_R8A7793_SYSC_H__
#define __DT_BINDINGS_POWER_R8A7793_SYSC_H__

/*
 * These power domain indices match the numbers of the interrupt bits
 * representing the power areas in the various Interrupt Registers
 * (e.g. SYSCISR, Interrupt Status Register)
 *
 * Note that R-Car M2-N is identical to R-Car M2-W w.r.t. power domains.
 */

#define R8A7793_PD_CA15_CPU0		 0
#define R8A7793_PD_CA15_CPU1		 1
#define R8A7793_PD_CA15_SCU		12
#define R8A7793_PD_SH_4A		16
#define R8A7793_PD_SGX			20

/* Always-on power area */
#define R8A7793_PD_ALWAYS_ON		32

#endif /* __DT_BINDINGS_POWER_R8A7793_SYSC_H__ */
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