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Commit c1f8e57c authored by Mathieu Poirier's avatar Mathieu Poirier Committed by Greg Kroah-Hartman
Browse files

coresight: etm3x: moving etm_readl/writel to header file 



Moving functions etm_readl/writel to file "coresight-etm.h"
so that the main ETM3x driver can be split in more than one
file.

Signed-off-by: default avatarMathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 5da5325f

drivers/hwtracing/coresight/coresight-etm.h

+29 −0
Original line number Diff line number Diff line
@@ -251,4 +251,33 @@ enum etm_addr_type { 
	ETM_ADDR_TYPE_START,

	ETM_ADDR_TYPE_STOP,

};



static inline void etm_writel(struct etm_drvdata *drvdata,

			      u32 val, u32 off)

{

	if (drvdata->use_cp14) {

		if (etm_writel_cp14(off, val)) {

			dev_err(drvdata->dev,

				"invalid CP14 access to ETM reg: %#x", off);

		}

	} else {

		writel_relaxed(val, drvdata->base + off);

	}

}



static inline unsigned int etm_readl(struct etm_drvdata *drvdata, u32 off)

{

	u32 val;



	if (drvdata->use_cp14) {

		if (etm_readl_cp14(off, &val)) {

			dev_err(drvdata->dev,

				"invalid CP14 access to ETM reg: %#x", off);

		}

	} else {

		val = readl_relaxed(drvdata->base + off);

	}



	return val;

}

#endif

drivers/hwtracing/coresight/coresight-etm3x.c

+0 −29
Original line number Diff line number Diff line
@@ -42,35 +42,6 @@ module_param_named(boot_enable, boot_enable, int, S_IRUGO); 
static int etm_count;

static struct etm_drvdata *etmdrvdata[NR_CPUS];



static inline void etm_writel(struct etm_drvdata *drvdata,

			      u32 val, u32 off)

{

	if (drvdata->use_cp14) {

		if (etm_writel_cp14(off, val)) {

			dev_err(drvdata->dev,

				"invalid CP14 access to ETM reg: %#x", off);

		}

	} else {

		writel_relaxed(val, drvdata->base + off);

	}

}



static inline unsigned int etm_readl(struct etm_drvdata *drvdata, u32 off)

{

	u32 val;



	if (drvdata->use_cp14) {

		if (etm_readl_cp14(off, &val)) {

			dev_err(drvdata->dev,

				"invalid CP14 access to ETM reg: %#x", off);

		}

	} else {

		val = readl_relaxed(drvdata->base + off);

	}



	return val;

}



/*

 * Memory mapped writes to clear os lock are not supported on some processors

 * and OS lock must be unlocked before any memory mapped access on such