Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit c1ece48c authored by Yan, Zheng's avatar Yan, Zheng Committed by Ingo Molnar
Browse files

perf/x86: Fix format definition of SNB-EP uncore QPI box 



The event control register of SNB-EP uncore QPI box has a one bit
extension at bit position 21.

Reported-by: default avatarStephane Eranian <eranian@google.com>
Signed-off-by: default avatarYan, Zheng <zheng.z.yan@intel.com>
Signed-off-by: default avatarPeter Zijlstra <a.p.zijlstra@chello.nl>
Link: http://lkml.kernel.org/r/1343097850-4348-1-git-send-email-zheng.z.yan@intel.com


Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
parent 597ed953

arch/x86/kernel/cpu/perf_event_intel_uncore.c

+21 −1
Original line number Diff line number Diff line
@@ -18,6 +18,7 @@ static struct event_constraint constraint_empty = 
	EVENT_CONSTRAINT(0, 0, 0);



DEFINE_UNCORE_FORMAT_ATTR(event, event, "config:0-7");

DEFINE_UNCORE_FORMAT_ATTR(event_ext, event, "config:0-7,21");

DEFINE_UNCORE_FORMAT_ATTR(umask, umask, "config:8-15");

DEFINE_UNCORE_FORMAT_ATTR(edge, edge, "config:18");

DEFINE_UNCORE_FORMAT_ATTR(tid_en, tid_en, "config:19");
@@ -293,6 +294,15 @@ static struct attribute *snbep_uncore_pcu_formats_attr[] = { 
	NULL,

};



static struct attribute *snbep_uncore_qpi_formats_attr[] = {

	&format_attr_event_ext.attr,

	&format_attr_umask.attr,

	&format_attr_edge.attr,

	&format_attr_inv.attr,

	&format_attr_thresh8.attr,

	NULL,

};



static struct uncore_event_desc snbep_uncore_imc_events[] = {

	INTEL_UNCORE_EVENT_DESC(clockticks,      "event=0xff,umask=0x00"),

	INTEL_UNCORE_EVENT_DESC(cas_count_read,  "event=0x04,umask=0x03"),
@@ -328,6 +338,11 @@ static struct attribute_group snbep_uncore_pcu_format_group = { 
	.attrs = snbep_uncore_pcu_formats_attr,

};



static struct attribute_group snbep_uncore_qpi_format_group = {

	.name = "format",

	.attrs = snbep_uncore_qpi_formats_attr,

};



static struct intel_uncore_ops snbep_uncore_msr_ops = {

	.init_box	= snbep_uncore_msr_init_box,

	.disable_box	= snbep_uncore_msr_disable_box,
@@ -499,8 +514,13 @@ static struct intel_uncore_type snbep_uncore_qpi = { 
	.num_counters   = 4,

	.num_boxes	= 2,

	.perf_ctr_bits	= 48,

	.perf_ctr	= SNBEP_PCI_PMON_CTR0,

	.event_ctl	= SNBEP_PCI_PMON_CTL0,

	.event_mask	= SNBEP_QPI_PCI_PMON_RAW_EVENT_MASK,

	.box_ctl	= SNBEP_PCI_PMON_BOX_CTL,

	.ops		= &snbep_uncore_pci_ops,

	.event_descs	= snbep_uncore_qpi_events,

	SNBEP_UNCORE_PCI_COMMON_INIT(),

	.format_group	= &snbep_uncore_qpi_format_group,

};

arch/x86/kernel/cpu/perf_event_intel_uncore.h

+4 −0
Original line number Diff line number Diff line
@@ -113,6 +113,10 @@ 
				 SNBEP_PCU_MSR_PMON_CTL_OCC_INVERT | \

				 SNBEP_PCU_MSR_PMON_CTL_OCC_EDGE_DET)



#define SNBEP_QPI_PCI_PMON_RAW_EVENT_MASK	\

				(SNBEP_PMON_RAW_EVENT_MASK | \

				 SNBEP_PMON_CTL_EV_SEL_EXT)



/* SNB-EP pci control register */

#define SNBEP_PCI_PMON_BOX_CTL			0xf4

#define SNBEP_PCI_PMON_CTL0			0xd8