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Commit c06df416 authored by Michael Adisumarta's avatar Michael Adisumarta Committed by Gerrit - the friendly Code Review server
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msm: ipa4: Introduce IPA PM to IPA 



Introduce a new framework to allow power management between
different clients. Allows string based client registration,
synchronous/asynchronous activation and deactivation, and
scales clock based on activated clients throughput with
the option to override for a specific use case.

Change-Id: I0028e006a0a50f408694bca9b59fbc900125be8d
CRs-Fixed: 2097404
Signed-off-by: default avatarMichael Adisumarta <madisuma@codeaurora.org>
parent f5d98565

drivers/platform/msm/ipa/ipa_v3/Makefile

+1 −1
Original line number Diff line number Diff line
@@ -4,6 +4,6 @@ obj-$(CONFIG_IPA3) += ipat.o 
ipat-y := ipa.o ipa_debugfs.o ipa_hdr.o ipa_flt.o ipa_rt.o ipa_dp.o ipa_client.o \

	ipa_utils.o ipa_nat.o ipa_intf.o teth_bridge.o ipa_interrupts.o \

	ipa_uc.o ipa_uc_wdi.o ipa_dma.o ipa_uc_mhi.o ipa_mhi.o ipa_uc_ntn.o \

	ipa_hw_stats.o

	ipa_hw_stats.o ipa_pm.o



obj-$(CONFIG_RMNET_IPA3) += rmnet_ipa.o ipa_qmi_service_v01.o ipa_qmi_service.o rmnet_ipa_fd_ioctl.o

drivers/platform/msm/ipa/ipa_v3/ipa.c

+47 −0
Original line number Diff line number Diff line
@@ -3712,6 +3712,53 @@ void ipa3_dec_release_wakelock(void) 
	spin_unlock_irqrestore(&ipa3_ctx->wakelock_ref_cnt.spinlock, flags);

}



int ipa3_set_clock_plan_from_pm(int idx)

{

	u32 clk_rate;



	IPADBG_LOW("idx = %d\n", idx);



	if (idx <= 0 || idx >= ipa3_ctx->ctrl->msm_bus_data_ptr->num_usecases) {

		IPAERR("bad voltage\n");

		return -EINVAL;

	}



	if (idx == 1)

		clk_rate = ipa3_ctx->ctrl->ipa_clk_rate_svs;

	else if (idx == 2)

		clk_rate = ipa3_ctx->ctrl->ipa_clk_rate_nominal;

	else if (idx == 3)

		clk_rate = ipa3_ctx->ctrl->ipa_clk_rate_turbo;

	else {

		IPAERR("bad voltage\n");

		WARN_ON(1);

		return -EFAULT;

	}



	if (clk_rate == ipa3_ctx->curr_ipa_clk_rate) {

		IPADBG_LOW("Same voltage\n");

		return 0;

	}



	mutex_lock(&ipa3_ctx->ipa3_active_clients.mutex);

	ipa3_ctx->curr_ipa_clk_rate = clk_rate;

	ipa3_ctx->ipa3_active_clients.bus_vote_idx = idx;

	IPADBG_LOW("setting clock rate to %u\n", ipa3_ctx->curr_ipa_clk_rate);

	if (atomic_read(&ipa3_ctx->ipa3_active_clients.cnt) > 0) {

		if (ipa3_clk)

			clk_set_rate(ipa3_clk, ipa3_ctx->curr_ipa_clk_rate);

		if (msm_bus_scale_client_update_request(ipa3_ctx->ipa_bus_hdl,

				ipa3_get_bus_vote()))

			WARN_ON(1);

	} else {

		IPADBG_LOW("clocks are gated, not setting rate\n");

	}

	mutex_unlock(&ipa3_ctx->ipa3_active_clients.mutex);

	IPADBG_LOW("Done\n");



	return 0;

}



int ipa3_set_required_perf_profile(enum ipa_voltage_level floor_voltage,

				  u32 bandwidth_mbps)

{

drivers/platform/msm/ipa/ipa_v3/ipa_i.h

+2 −0
Original line number Diff line number Diff line
@@ -869,6 +869,7 @@ struct ipa3_stats { 
struct ipa3_active_clients {

	struct mutex mutex;

	atomic_t cnt;

	int bus_vote_idx;

};



struct ipa3_wakelock_ref_cnt {
@@ -2226,4 +2227,5 @@ void ipa3_disable_prefetch(enum ipa_client_type client); 
int ipa3_alloc_common_event_ring(void);

int ipa3_allocate_dma_task_for_gsi(void);

void ipa3_free_dma_task_for_gsi(void);

int ipa3_set_clock_plan_from_pm(int idx);

#endif /* _IPA3_I_H_ */