Merge "msm: pcie: Add the regulator node for PCI-E client" (bfb71549) · Commits · e / devices / android_kernel_fairphone_FP3

drivers/pci/host/pci-msm.c

+35 −16

Original line number	Diff line number	Diff line
		@@ -517,6 +517,7 @@ struct msm_pcie_dev_t {
		struct platform_device *pdev;
		struct pci_dev *dev;
		struct regulator *gdsc;
		struct regulator *vreg_pcie;
		struct regulator *gdsc_smmu;
		struct msm_pcie_vreg_info_t vreg[MSM_PCIE_MAX_VREG];
		struct msm_pcie_gpio_info_t gpio[MSM_PCIE_MAX_GPIO];
		@@ -633,7 +634,6 @@ struct msm_pcie_dev_t {
		bool use_pinctrl;
		struct pinctrl *pinctrl;
		struct pinctrl_state *pins_default;
		struct pinctrl_state *pins_power_on;
		struct pinctrl_state *pins_sleep;
		struct msm_pcie_device_info pcidev_table[MAX_DEVICE_NUM];
		};
		@@ -3422,6 +3422,18 @@ static int msm_pcie_get_resources(struct msm_pcie_dev_t *dev,
		}
		}

		dev->vreg_pcie = devm_regulator_get(&pdev->dev, "vreg-pcie");

		if (IS_ERR(dev->vreg_pcie)) {
		PCIE_ERR(dev, "PCIe: RC%d Failed to get %s VREG_PCIE:%ld\n",
		dev->rc_idx, dev->pdev->name, PTR_ERR(dev->gdsc));
		if (PTR_ERR(dev->vreg_pcie) == -EPROBE_DEFER)
		PCIE_DBG(dev, "PCIe: EPROBE_DEFER for %s VREG_PCIE\n",
		dev->pdev->name);
		ret = PTR_ERR(dev->vreg_pcie);
		goto out;
		}

		dev->gdsc = devm_regulator_get(&pdev->dev, "gdsc-vdd");

		if (IS_ERR(dev->gdsc)) {
		@@ -4287,6 +4299,19 @@ int msm_pcie_enumerate(u32 rc_idx)
		}

		if (!dev->enumerated) {

		/Open the PCIE VCC before enable the pcie /
		if (dev->vreg_pcie) {
		ret = regulator_enable(dev->vreg_pcie);

		if (ret) {
		PCIE_ERR(dev,
		"PCIe: fail to open vcc for RC%d (%s)\n",
		dev->rc_idx, dev->pdev->name);
		return ret;
		}
		}

		ret = msm_pcie_enable(dev, PM_ALL);

		/* kick start ARM PCI configuration framework */
		@@ -6013,16 +6038,6 @@ static int msm_pcie_probe(struct platform_device *pdev)
		msm_pcie_dev[rc_idx].pins_default = NULL;
		}

		msm_pcie_dev[rc_idx].pins_power_on =
		pinctrl_lookup_state(msm_pcie_dev[rc_idx].pinctrl,
		"slot_power_on");
		if (IS_ERR(msm_pcie_dev[rc_idx].pins_power_on)) {
		PCIE_ERR(&msm_pcie_dev[rc_idx],
		"PCIe: RC%d could not get pinctrl power_on state\n",
		rc_idx);
		msm_pcie_dev[rc_idx].pins_power_on = NULL;
		}

		msm_pcie_dev[rc_idx].pins_sleep =
		pinctrl_lookup_state(msm_pcie_dev[rc_idx].pinctrl,
		"sleep");
		@@ -6050,11 +6065,6 @@ static int msm_pcie_probe(struct platform_device *pdev)
		msm_pcie_sysfs_init(&msm_pcie_dev[rc_idx]);

		msm_pcie_dev[rc_idx].drv_ready = true;
		if (msm_pcie_dev[rc_idx].use_pinctrl &&
		msm_pcie_dev[rc_idx].pins_power_on) {
		pinctrl_select_state(msm_pcie_dev[rc_idx].pinctrl,
		msm_pcie_dev[rc_idx].pins_power_on);
		}

		if (msm_pcie_dev[rc_idx].boot_option &
		MSM_PCIE_NO_PROBE_ENUMERATION) {
		@@ -6122,6 +6132,15 @@ static int msm_pcie_remove(struct platform_device *pdev)
		msm_pcie_gpio_deinit(&msm_pcie_dev[rc_idx]);
		msm_pcie_release_resources(&msm_pcie_dev[rc_idx]);

		/Close the PCIE VCC when remove the pcie/
		if (msm_pcie_dev[rc_idx].vreg_pcie) {
		ret = regulator_disable(msm_pcie_dev[rc_idx].vreg_pcie);

		if (ret)
		pr_err("%s: PCIe: fail to close VCC.\n", __func__);

		}

		out:
		mutex_unlock(&pcie_drv.drv_lock);