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Commit bf4f9c63 authored by Thomas Petazzoni's avatar Thomas Petazzoni Committed by Jason Cooper
Browse files

arm: mvebu: PCIe Device Tree informations for Armada XP DB 



The Marvell evaluation board (DB) for the Armada XP SoC has 6
physicals full-size PCIe slots, so we enable the corresponding PCIe
interfaces in the Device Tree.

Signed-off-by: default avatarThomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: default avatarJason Cooper <jason@lakedaemon.net>
parent 95999cf0

arch/arm/boot/dts/armada-xp-db.dts

+33 −0
Original line number Diff line number Diff line
@@ -121,5 +121,38 @@ 
				spi-max-frequency = <20000000>;

			};

		};



		pcie-controller {

			status = "okay";



			/*

			 * All 6 slots are physically present as

			 * standard PCIe slots on the board.

			 */

			pcie@1,0 {

				/* Port 0, Lane 0 */

				status = "okay";

			};

			pcie@2,0 {

				/* Port 0, Lane 1 */

				status = "okay";

			};

			pcie@3,0 {

				/* Port 0, Lane 2 */

				status = "okay";

			};

			pcie@4,0 {

				/* Port 0, Lane 3 */

				status = "okay";

			};

			pcie@9,0 {

				/* Port 2, Lane 0 */

				status = "okay";

			};

			pcie@10,0 {

				/* Port 3, Lane 0 */

				status = "okay";

			};

		};

	};

};