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Commit bf30f950 authored by Paul Walmsley's avatar Paul Walmsley
Browse files

ARM: OMAP4: hwmod data: add EMIF1 and 2 



Add the EMIF1 and 2 hwmods and associated interconnect data.  The EMIFs
are SDRAM interface IP blocks.

Signed-off-by: default avatarPaul Walmsley <paul@pwsan.com>
Signed-off-by: default avatarBenoît Cousson <b-cousson@ti.com>
parent eb42b5d3

arch/arm/mach-omap2/omap_hwmod_44xx_data.c

+96 −2
Original line number Diff line number Diff line
@@ -261,8 +261,6 @@ static struct omap_hwmod omap44xx_mpu_private_hwmod = { 
 *  efuse_ctrl_cust

 *  efuse_ctrl_std

 *  elm

 *  emif1

 *  emif2

 *  gpu

 *  mcasp

 *  mpu_c0
@@ -812,6 +810,64 @@ static struct omap_hwmod omap44xx_dss_venc_hwmod = { 
	},

};



/*

 * 'emif' class

 * external memory interface no1

 */



static struct omap_hwmod_class_sysconfig omap44xx_emif_sysc = {

	.rev_offs	= 0x0000,

};



static struct omap_hwmod_class omap44xx_emif_hwmod_class = {

	.name	= "emif",

	.sysc	= &omap44xx_emif_sysc,

};



/* emif1 */

static struct omap_hwmod_irq_info omap44xx_emif1_irqs[] = {

	{ .irq = 110 + OMAP44XX_IRQ_GIC_START },

	{ .irq = -1 }

};



static struct omap_hwmod omap44xx_emif1_hwmod = {

	.name		= "emif1",

	.class		= &omap44xx_emif_hwmod_class,

	.clkdm_name	= "l3_emif_clkdm",

	.flags		= HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET,

	.mpu_irqs	= omap44xx_emif1_irqs,

	.main_clk	= "ddrphy_ck",

	.prcm = {

		.omap4 = {

			.clkctrl_offs = OMAP4_CM_MEMIF_EMIF_1_CLKCTRL_OFFSET,

			.context_offs = OMAP4_RM_MEMIF_EMIF_1_CONTEXT_OFFSET,

			.modulemode   = MODULEMODE_HWCTRL,

		},

	},

};



/* emif2 */

static struct omap_hwmod_irq_info omap44xx_emif2_irqs[] = {

	{ .irq = 111 + OMAP44XX_IRQ_GIC_START },

	{ .irq = -1 }

};



static struct omap_hwmod omap44xx_emif2_hwmod = {

	.name		= "emif2",

	.class		= &omap44xx_emif_hwmod_class,

	.clkdm_name	= "l3_emif_clkdm",

	.flags		= HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET,

	.mpu_irqs	= omap44xx_emif2_irqs,

	.main_clk	= "ddrphy_ck",

	.prcm = {

		.omap4 = {

			.clkctrl_offs = OMAP4_CM_MEMIF_EMIF_2_CLKCTRL_OFFSET,

			.context_offs = OMAP4_RM_MEMIF_EMIF_2_CONTEXT_OFFSET,

			.modulemode   = MODULEMODE_HWCTRL,

		},

	},

};



/*

 * 'fdif' class

 * face detection hw accelerator module
@@ -3673,6 +3729,42 @@ static struct omap_hwmod_ocp_if omap44xx_l4_per__dss_venc = { 
	.user		= OCP_USER_MPU,

};



static struct omap_hwmod_addr_space omap44xx_emif1_addrs[] = {

	{

		.pa_start	= 0x4c000000,

		.pa_end		= 0x4c0000ff,

		.flags		= ADDR_TYPE_RT

	},

	{ }

};



/* emif_fw -> emif1 */

static struct omap_hwmod_ocp_if omap44xx_emif_fw__emif1 = {

	.master		= &omap44xx_emif_fw_hwmod,

	.slave		= &omap44xx_emif1_hwmod,

	.clk		= "l3_div_ck",

	.addr		= omap44xx_emif1_addrs,

	.user		= OCP_USER_MPU | OCP_USER_SDMA,

};



static struct omap_hwmod_addr_space omap44xx_emif2_addrs[] = {

	{

		.pa_start	= 0x4d000000,

		.pa_end		= 0x4d0000ff,

		.flags		= ADDR_TYPE_RT

	},

	{ }

};



/* emif_fw -> emif2 */

static struct omap_hwmod_ocp_if omap44xx_emif_fw__emif2 = {

	.master		= &omap44xx_emif_fw_hwmod,

	.slave		= &omap44xx_emif2_hwmod,

	.clk		= "l3_div_ck",

	.addr		= omap44xx_emif2_addrs,

	.user		= OCP_USER_MPU | OCP_USER_SDMA,

};



static struct omap_hwmod_addr_space omap44xx_fdif_addrs[] = {

	{

		.pa_start	= 0x4a10a000,
@@ -4926,6 +5018,8 @@ static struct omap_hwmod_ocp_if *omap44xx_hwmod_ocp_ifs[] __initdata = { 
	&omap44xx_l4_per__dss_rfbi,

	&omap44xx_l3_main_2__dss_venc,

	&omap44xx_l4_per__dss_venc,

	&omap44xx_emif_fw__emif1,

	&omap44xx_emif_fw__emif2,

	&omap44xx_l4_cfg__fdif,

	&omap44xx_l4_wkup__gpio1,

	&omap44xx_l4_per__gpio2,