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Commit bf16cdf4 authored by Aneesh Kumar K.V's avatar Aneesh Kumar K.V Committed by Michael Ellerman
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powerpc/mm/radix: Update LPCR HR bit as per ISA 



PowerISA 3.0 requires the MMU mode (radix vs. hash) of the hypervisor
to be mirrored in the LPCR register, in addition to the partition table.
This is done to avoid fetching from the table when deciding, among other
things, how to perform transitions to HV mode on some interrupts.
So let's set it up appropriately

Signed-off-by: default avatarAneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Acked-by: default avatarBalbir Singh <bsingharora@gmail.com>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
parent 8cd6d3c2

arch/powerpc/include/asm/reg.h

+1 −0
Original line number Diff line number Diff line
@@ -366,6 +366,7 @@ 
#define   LPCR_HVICE   0x00000002      /* P9: HV interrupt enable */

#define   LPCR_HDICE   0x00000001      /* Hyp Decr enable (HV,PR,EE) */

#define   LPCR_UPRT    0x00400000      /* Use Process Table (ISA 3) */

#define   LPCR_HR      0x00100000

#ifndef SPRN_LPID

#define SPRN_LPID	0x13F	/* Logical Partition Identifier */

#endif

arch/powerpc/mm/pgtable-radix.c

+2 −2
Original line number Diff line number Diff line
@@ -342,7 +342,7 @@ void __init radix__early_init_mmu(void) 
	radix_init_page_sizes();

	if (!firmware_has_feature(FW_FEATURE_LPAR)) {

		lpcr = mfspr(SPRN_LPCR);

		mtspr(SPRN_LPCR, lpcr | LPCR_UPRT);

		mtspr(SPRN_LPCR, lpcr | LPCR_UPRT | LPCR_HR);

		radix_init_partition_table();

	}
@@ -357,7 +357,7 @@ void radix__early_init_mmu_secondary(void) 
	 */

	if (!firmware_has_feature(FW_FEATURE_LPAR)) {

		lpcr = mfspr(SPRN_LPCR);

		mtspr(SPRN_LPCR, lpcr | LPCR_UPRT);

		mtspr(SPRN_LPCR, lpcr | LPCR_UPRT | LPCR_HR);



		mtspr(SPRN_PTCR,

		      __pa(partition_tb) | (PATB_SIZE_SHIFT - 12));