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Commit be406d93 authored by Subhash Jadavani's avatar Subhash Jadavani Committed by Xiaonian Wang
Browse files

mmc: sdhci-msm: configure CORE_CSR_CDC_DELAY_CFG to recommended value 



Program CORE_CSR_CDC_DELAY_CFG for hardware recommended 1.25ns delay.
We may see data CRC errors if it's programmed for any other delay
value.

CRs-Fixed: 683894
Change-Id: Id7de28b7b9222c35e6b419e416f72bd8f98cbaf8
Signed-off-by: default avatarSubhash Jadavani <subhashj@codeaurora.org>
parent 0e8efbab

drivers/mmc/host/sdhci-msm.c

+1 −1
Original line number Diff line number Diff line
@@ -772,7 +772,7 @@ static int sdhci_msm_cdclp533_calibration(struct sdhci_host *host) 
	writel_relaxed(0x4, host->ioaddr + CORE_CSR_CDC_CAL_TIMER_CFG1);

	writel_relaxed(0xCB732020, host->ioaddr + CORE_CSR_CDC_REFCOUNT_CFG);

	writel_relaxed(0xB19, host->ioaddr + CORE_CSR_CDC_COARSE_CAL_CFG);

	writel_relaxed(0x3AC, host->ioaddr + CORE_CSR_CDC_DELAY_CFG);

	writel_relaxed(0x4E2, host->ioaddr + CORE_CSR_CDC_DELAY_CFG);

	writel_relaxed(0x0, host->ioaddr + CORE_CDC_OFFSET_CFG);

	writel_relaxed(0x16334, host->ioaddr + CORE_CDC_SLAVE_DDA_CFG);