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Commit bde6c6e1 authored by Scott Wood's avatar Scott Wood Committed by Paul Mackerras
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[POWERPC] Check _PAGE_RW and _PAGE_PRESENT on kernel addresses 



Previously, the TLB miss handlers assumed that pages above KERNELBASE are
always present and read/write.  This assumption is false in the case of
CONFIG_DEBUG_PAGEALLOC.

Signed-off-by: default avatarScott Wood <scottwood@freescale.com>
Signed-off-by: default avatarPaul Mackerras <paulus@samba.org>
parent 96ebc3bf

arch/powerpc/kernel/head_32.S

+6 −6
Original line number Original line Diff line number Diff line
@@ -475,10 +475,10 @@ InstructionTLBMiss: 
	li	r1,_PAGE_USER|_PAGE_PRESENT /* low addresses tested as user */

	li	r1,_PAGE_USER|_PAGE_PRESENT /* low addresses tested as user */

	lwz	r2,PGDIR(r2)

	lwz	r2,PGDIR(r2)

	blt+	112f

	blt+	112f

	mfspr	r2,SPRN_SRR1		/* and MSR_PR bit from SRR1 */

	rlwimi	r1,r2,32-12,29,29	/* shift MSR_PR to _PAGE_USER posn */

	lis	r2,swapper_pg_dir@ha	/* if kernel address, use */

	lis	r2,swapper_pg_dir@ha	/* if kernel address, use */

	addi	r2,r2,swapper_pg_dir@l	/* kernel page table */

	addi	r2,r2,swapper_pg_dir@l	/* kernel page table */

	mfspr	r1,SPRN_SRR1		/* and MSR_PR bit from SRR1 */

	rlwinm	r1,r1,32-12,29,29	/* shift MSR_PR to _PAGE_USER posn */

112:	tophys(r2,r2)

112:	tophys(r2,r2)

	rlwimi	r2,r3,12,20,29		/* insert top 10 bits of address */

	rlwimi	r2,r3,12,20,29		/* insert top 10 bits of address */

	lwz	r2,0(r2)		/* get pmd entry */

	lwz	r2,0(r2)		/* get pmd entry */
@@ -549,10 +549,10 @@ DataLoadTLBMiss: 
	li	r1,_PAGE_USER|_PAGE_PRESENT /* low addresses tested as user */

	li	r1,_PAGE_USER|_PAGE_PRESENT /* low addresses tested as user */

	lwz	r2,PGDIR(r2)

	lwz	r2,PGDIR(r2)

	blt+	112f

	blt+	112f

	mfspr	r2,SPRN_SRR1		/* and MSR_PR bit from SRR1 */

	rlwimi	r1,r2,32-12,29,29	/* shift MSR_PR to _PAGE_USER posn */

	lis	r2,swapper_pg_dir@ha	/* if kernel address, use */

	lis	r2,swapper_pg_dir@ha	/* if kernel address, use */

	addi	r2,r2,swapper_pg_dir@l	/* kernel page table */

	addi	r2,r2,swapper_pg_dir@l	/* kernel page table */

	mfspr	r1,SPRN_SRR1		/* and MSR_PR bit from SRR1 */

	rlwinm	r1,r1,32-12,29,29	/* shift MSR_PR to _PAGE_USER posn */

112:	tophys(r2,r2)

112:	tophys(r2,r2)

	rlwimi	r2,r3,12,20,29		/* insert top 10 bits of address */

	rlwimi	r2,r3,12,20,29		/* insert top 10 bits of address */

	lwz	r2,0(r2)		/* get pmd entry */

	lwz	r2,0(r2)		/* get pmd entry */
@@ -621,10 +621,10 @@ DataStoreTLBMiss: 
	li	r1,_PAGE_RW|_PAGE_USER|_PAGE_PRESENT /* access flags */

	li	r1,_PAGE_RW|_PAGE_USER|_PAGE_PRESENT /* access flags */

	lwz	r2,PGDIR(r2)

	lwz	r2,PGDIR(r2)

	blt+	112f

	blt+	112f

	mfspr	r2,SPRN_SRR1		/* and MSR_PR bit from SRR1 */

	rlwimi	r1,r2,32-12,29,29	/* shift MSR_PR to _PAGE_USER posn */

	lis	r2,swapper_pg_dir@ha	/* if kernel address, use */

	lis	r2,swapper_pg_dir@ha	/* if kernel address, use */

	addi	r2,r2,swapper_pg_dir@l	/* kernel page table */

	addi	r2,r2,swapper_pg_dir@l	/* kernel page table */

	mfspr	r1,SPRN_SRR1		/* and MSR_PR bit from SRR1 */

	rlwinm	r1,r1,32-12,29,29	/* shift MSR_PR to _PAGE_USER posn */

112:	tophys(r2,r2)

112:	tophys(r2,r2)

	rlwimi	r2,r3,12,20,29		/* insert top 10 bits of address */

	rlwimi	r2,r3,12,20,29		/* insert top 10 bits of address */

	lwz	r2,0(r2)		/* get pmd entry */

	lwz	r2,0(r2)		/* get pmd entry */