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Commit bda56cb5 authored by Prasad Sodagudi's avatar Prasad Sodagudi Committed by Gerrit - the friendly Code Review server
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arm64: Add padding to thread_info structure



Both flags and preempt_count variables of thread_info are falling
into the same cache line. When one of the cores is incrementing/
decrementing the preempt_count continuously in a tight loop with
spin_lock_irqsave() and spin_unlock_irqrestore() APIs, this causes the
flags update to be delayed. When the thread_info flags updates are
delayed, it leads to increased tasks scheduling latencies. So move the
thread_info's preempt_count into different cache line by adding padding.

Change-Id: I950d15a02b4df0c31862c3a11eb1a3d8fc17dff8
Signed-off-by: default avatarPrasad Sodagudi <psodagud@codeaurora.org>
parent a84e7ded
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+1 −0
Original line number Diff line number Diff line
@@ -40,6 +40,7 @@ typedef unsigned long mm_segment_t;
 */
struct thread_info {
	unsigned long		flags;		/* low level flags */
	unsigned long		padding[7];
	mm_segment_t		addr_limit;	/* address limit */
#ifdef CONFIG_ARM64_SW_TTBR0_PAN
	u64			ttbr0;		/* saved TTBR0_EL1 */