at91: switch to CLKDEV_LOOKUP (bd602995) · Commits · e / devices / android_kernel_fairphone_FP3

arch/arm/Kconfig

+1 −0

Original line number	Original line	Diff line number	Diff line
	@@ -294,6 +294,7 @@ config ARCH_AT91
	bool "Atmel AT91"		bool "Atmel AT91"
	select ARCH_REQUIRE_GPIOLIB		select ARCH_REQUIRE_GPIOLIB
	select HAVE_CLK		select HAVE_CLK
			select CLKDEV_LOOKUP
	help		help
	This enables support for systems based on the Atmel AT91RM9200,		This enables support for systems based on the Atmel AT91RM9200,
	AT91SAM9 and AT91CAP9 processors.		AT91SAM9 and AT91CAP9 processors.

arch/arm/mach-at91/at572d940hf.c

+32 −0

Original line number	Original line	Diff line number	Diff line
	@@ -205,6 +205,21 @@ static struct clk *periph_clocks[] __initdata = {
	/* irq0 .. irq2 */		/* irq0 .. irq2 */
	};		};

			static struct clk_lookup periph_clocks_lookups[] = {
			CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.0", &spi0_clk),
			CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.1", &spi1_clk),
			CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tc0_clk),
			CLKDEV_CON_DEV_ID("t1_clk", "atmel_tcb.0", &tc1_clk),
			CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.0", &tc2_clk),
			};

			static struct clk_lookup usart_clocks_lookups[] = {
			CLKDEV_CON_DEV_ID("usart", "atmel_usart.0", &mck),
			CLKDEV_CON_DEV_ID("usart", "atmel_usart.1", &usart0_clk),
			CLKDEV_CON_DEV_ID("usart", "atmel_usart.2", &usart1_clk),
			CLKDEV_CON_DEV_ID("usart", "atmel_usart.3", &usart2_clk),
			};

	/*		/*
	* The five programmable clocks.		* The five programmable clocks.
	* You must configure pin multiplexing to bring these signals out.		* You must configure pin multiplexing to bring these signals out.
	@@ -262,6 +277,11 @@ static void __init at572d940hf_register_clocks(void)
	for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)		for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
	clk_register(periph_clocks[i]);		clk_register(periph_clocks[i]);

			clkdev_add_table(periph_clocks_lookups,
			ARRAY_SIZE(periph_clocks_lookups));
			clkdev_add_table(usart_clocks_lookups,
			ARRAY_SIZE(usart_clocks_lookups));

	clk_register(&pck0);		clk_register(&pck0);
	clk_register(&pck1);		clk_register(&pck1);
	clk_register(&pck2);		clk_register(&pck2);
	@@ -272,6 +292,18 @@ static void __init at572d940hf_register_clocks(void)
	clk_register(&hck1);		clk_register(&hck1);
	}		}

			static struct clk_lookup console_clock_lookup;

			void __init at572d940hf_set_console_clock(int id)
			{
			if (id >= ARRAY_SIZE(usart_clocks_lookups))
			return;

			console_clock_lookup.con_id = "usart";
			console_clock_lookup.clk = usart_clocks_lookups[id].clk;
			clkdev_add(&console_clock_lookup);
			}

	/* --------------------------------------------------------------------		/* --------------------------------------------------------------------
	* GPIO		* GPIO
	* -------------------------------------------------------------------- */		* -------------------------------------------------------------------- */

arch/arm/mach-at91/at572d940hf_devices.c

+3 −11

Original line number	Original line	Diff line number	Diff line
	@@ -532,7 +532,6 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
	at91_set_A_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */		at91_set_A_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */
	at91_set_A_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */		at91_set_A_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */

	at91_clock_associate("spi0_clk", &at572d940hf_spi0_device.dev, "spi_clk");
	platform_device_register(&at572d940hf_spi0_device);		platform_device_register(&at572d940hf_spi0_device);
	}		}
	if (enable_spi1) {		if (enable_spi1) {
	@@ -540,7 +539,6 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
	at91_set_A_periph(AT91_PIN_PC1, 0); /* SPI1_MOSI */		at91_set_A_periph(AT91_PIN_PC1, 0); /* SPI1_MOSI */
	at91_set_A_periph(AT91_PIN_PC2, 0); /* SPI1_SPCK */		at91_set_A_periph(AT91_PIN_PC2, 0); /* SPI1_SPCK */

	at91_clock_associate("spi1_clk", &at572d940hf_spi1_device.dev, "spi_clk");
	platform_device_register(&at572d940hf_spi1_device);		platform_device_register(&at572d940hf_spi1_device);
	}		}
	}		}
	@@ -587,10 +585,6 @@ static struct platform_device at572d940hf_tcb_device = {

	static void __init at91_add_device_tc(void)		static void __init at91_add_device_tc(void)
	{		{
	/* this chip has a separate clock and irq for each TC channel */
	at91_clock_associate("tc0_clk", &at572d940hf_tcb_device.dev, "t0_clk");
	at91_clock_associate("tc1_clk", &at572d940hf_tcb_device.dev, "t1_clk");
	at91_clock_associate("tc2_clk", &at572d940hf_tcb_device.dev, "t2_clk");
	platform_device_register(&at572d940hf_tcb_device);		platform_device_register(&at572d940hf_tcb_device);
	}		}
	#else		#else
	@@ -828,22 +822,18 @@ void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
	case 0: /* DBGU */		case 0: /* DBGU */
	pdev = &at572d940hf_dbgu_device;		pdev = &at572d940hf_dbgu_device;
	configure_dbgu_pins();		configure_dbgu_pins();
	at91_clock_associate("mck", &pdev->dev, "usart");
	break;		break;
	case AT572D940HF_ID_US0:		case AT572D940HF_ID_US0:
	pdev = &at572d940hf_uart0_device;		pdev = &at572d940hf_uart0_device;
	configure_usart0_pins(pins);		configure_usart0_pins(pins);
	at91_clock_associate("usart0_clk", &pdev->dev, "usart");
	break;		break;
	case AT572D940HF_ID_US1:		case AT572D940HF_ID_US1:
	pdev = &at572d940hf_uart1_device;		pdev = &at572d940hf_uart1_device;
	configure_usart1_pins(pins);		configure_usart1_pins(pins);
	at91_clock_associate("usart1_clk", &pdev->dev, "usart");
	break;		break;
	case AT572D940HF_ID_US2:		case AT572D940HF_ID_US2:
	pdev = &at572d940hf_uart2_device;		pdev = &at572d940hf_uart2_device;
	configure_usart2_pins(pins);		configure_usart2_pins(pins);
	at91_clock_associate("usart2_clk", &pdev->dev, "usart");
	break;		break;
	default:		default:
	return;		return;
	@@ -857,8 +847,10 @@ void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)

	void __init at91_set_serial_console(unsigned portnr)		void __init at91_set_serial_console(unsigned portnr)
	{		{
	if (portnr < ATMEL_MAX_UART)		if (portnr < ATMEL_MAX_UART) {
	atmel_default_console_device = at91_uarts[portnr];		atmel_default_console_device = at91_uarts[portnr];
			at572d940hf_set_console_clock(portnr);
			}
	}		}

	void __init at91_add_device_serial(void)		void __init at91_add_device_serial(void)

arch/arm/mach-at91/at91cap9.c

+36 −0

Original line number	Original line	Diff line number	Diff line
	@@ -222,6 +222,25 @@ static struct clk *periph_clocks[] __initdata = {
	// irq0 .. irq1		// irq0 .. irq1
	};		};

			static struct clk_lookup periph_clocks_lookups[] = {
			CLKDEV_CON_DEV_ID("hclk", "atmel_usba_udc.0", &utmi_clk),
			CLKDEV_CON_DEV_ID("pclk", "atmel_usba_udc.0", &udphs_clk),
			CLKDEV_CON_DEV_ID("mci_clk", "at91_mci.0", &mmc0_clk),
			CLKDEV_CON_DEV_ID("mci_clk", "at91_mci.1", &mmc1_clk),
			CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.0", &spi0_clk),
			CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.1", &spi1_clk),
			CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tcb_clk),
			CLKDEV_CON_DEV_ID("ssc", "ssc.0", &ssc0_clk),
			CLKDEV_CON_DEV_ID("ssc", "ssc.1", &ssc1_clk),
			};

			static struct clk_lookup usart_clocks_lookups[] = {
			CLKDEV_CON_DEV_ID("usart", "atmel_usart.0", &mck),
			CLKDEV_CON_DEV_ID("usart", "atmel_usart.1", &usart0_clk),
			CLKDEV_CON_DEV_ID("usart", "atmel_usart.2", &usart1_clk),
			CLKDEV_CON_DEV_ID("usart", "atmel_usart.3", &usart2_clk),
			};

	/*		/*
	* The four programmable clocks.		* The four programmable clocks.
	* You must configure pin multiplexing to bring these signals out.		* You must configure pin multiplexing to bring these signals out.
	@@ -258,12 +277,29 @@ static void __init at91cap9_register_clocks(void)
	for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)		for (i = 0; i < ARRAY_SIZE(periph_clocks); i++)
	clk_register(periph_clocks[i]);		clk_register(periph_clocks[i]);

			clkdev_add_table(periph_clocks_lookups,
			ARRAY_SIZE(periph_clocks_lookups));
			clkdev_add_table(usart_clocks_lookups,
			ARRAY_SIZE(usart_clocks_lookups));

	clk_register(&pck0);		clk_register(&pck0);
	clk_register(&pck1);		clk_register(&pck1);
	clk_register(&pck2);		clk_register(&pck2);
	clk_register(&pck3);		clk_register(&pck3);
	}		}

			static struct clk_lookup console_clock_lookup;

			void __init at91cap9_set_console_clock(int id)
			{
			if (id >= ARRAY_SIZE(usart_clocks_lookups))
			return;

			console_clock_lookup.con_id = "usart";
			console_clock_lookup.clk = usart_clocks_lookups[id].clk;
			clkdev_add(&console_clock_lookup);
			}

	/* --------------------------------------------------------------------		/* --------------------------------------------------------------------
	* GPIO		* GPIO
	* -------------------------------------------------------------------- */		* -------------------------------------------------------------------- */

arch/arm/mach-at91/at91cap9_devices.c

+3 −17

Original line number	Original line	Diff line number	Diff line
	@@ -181,10 +181,6 @@ void __init at91_add_device_usba(struct usba_platform_data *data)

	/* Pullup pin is handled internally by USB device peripheral */		/* Pullup pin is handled internally by USB device peripheral */

	/* Clocks */
	at91_clock_associate("utmi_clk", &at91_usba_udc_device.dev, "hclk");
	at91_clock_associate("udphs_clk", &at91_usba_udc_device.dev, "pclk");

	platform_device_register(&at91_usba_udc_device);		platform_device_register(&at91_usba_udc_device);
	}		}
	#else		#else
	@@ -355,7 +351,6 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
	}		}

	mmc0_data = *data;		mmc0_data = *data;
	at91_clock_associate("mci0_clk", &at91cap9_mmc0_device.dev, "mci_clk");
	platform_device_register(&at91cap9_mmc0_device);		platform_device_register(&at91cap9_mmc0_device);
	} else { /* MCI1 */		} else { /* MCI1 */
	/* CLK */		/* CLK */
	@@ -373,7 +368,6 @@ void __init at91_add_device_mmc(short mmc_id, struct at91_mmc_data *data)
	}		}

	mmc1_data = *data;		mmc1_data = *data;
	at91_clock_associate("mci1_clk", &at91cap9_mmc1_device.dev, "mci_clk");
	platform_device_register(&at91cap9_mmc1_device);		platform_device_register(&at91cap9_mmc1_device);
	}		}
	}		}
	@@ -614,7 +608,6 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
	at91_set_B_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */		at91_set_B_periph(AT91_PIN_PA1, 0); /* SPI0_MOSI */
	at91_set_B_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */		at91_set_B_periph(AT91_PIN_PA2, 0); /* SPI0_SPCK */

	at91_clock_associate("spi0_clk", &at91cap9_spi0_device.dev, "spi_clk");
	platform_device_register(&at91cap9_spi0_device);		platform_device_register(&at91cap9_spi0_device);
	}		}
	if (enable_spi1) {		if (enable_spi1) {
	@@ -622,7 +615,6 @@ void __init at91_add_device_spi(struct spi_board_info *devices, int nr_devices)
	at91_set_A_periph(AT91_PIN_PB13, 0); /* SPI1_MOSI */		at91_set_A_periph(AT91_PIN_PB13, 0); /* SPI1_MOSI */
	at91_set_A_periph(AT91_PIN_PB14, 0); /* SPI1_SPCK */		at91_set_A_periph(AT91_PIN_PB14, 0); /* SPI1_SPCK */

	at91_clock_associate("spi1_clk", &at91cap9_spi1_device.dev, "spi_clk");
	platform_device_register(&at91cap9_spi1_device);		platform_device_register(&at91cap9_spi1_device);
	}		}
	}		}
	@@ -659,8 +651,6 @@ static struct platform_device at91cap9_tcb_device = {

	static void __init at91_add_device_tc(void)		static void __init at91_add_device_tc(void)
	{		{
	/* this chip has one clock and irq for all three TC channels */
	at91_clock_associate("tcb_clk", &at91cap9_tcb_device.dev, "t0_clk");
	platform_device_register(&at91cap9_tcb_device);		platform_device_register(&at91cap9_tcb_device);
	}		}
	#else		#else
	@@ -1001,12 +991,10 @@ void __init at91_add_device_ssc(unsigned id, unsigned pins)
	case AT91CAP9_ID_SSC0:		case AT91CAP9_ID_SSC0:
	pdev = &at91cap9_ssc0_device;		pdev = &at91cap9_ssc0_device;
	configure_ssc0_pins(pins);		configure_ssc0_pins(pins);
	at91_clock_associate("ssc0_clk", &pdev->dev, "ssc");
	break;		break;
	case AT91CAP9_ID_SSC1:		case AT91CAP9_ID_SSC1:
	pdev = &at91cap9_ssc1_device;		pdev = &at91cap9_ssc1_device;
	configure_ssc1_pins(pins);		configure_ssc1_pins(pins);
	at91_clock_associate("ssc1_clk", &pdev->dev, "ssc");
	break;		break;
	default:		default:
	return;		return;
	@@ -1205,22 +1193,18 @@ void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)
	case 0: /* DBGU */		case 0: /* DBGU */
	pdev = &at91cap9_dbgu_device;		pdev = &at91cap9_dbgu_device;
	configure_dbgu_pins();		configure_dbgu_pins();
	at91_clock_associate("mck", &pdev->dev, "usart");
	break;		break;
	case AT91CAP9_ID_US0:		case AT91CAP9_ID_US0:
	pdev = &at91cap9_uart0_device;		pdev = &at91cap9_uart0_device;
	configure_usart0_pins(pins);		configure_usart0_pins(pins);
	at91_clock_associate("usart0_clk", &pdev->dev, "usart");
	break;		break;
	case AT91CAP9_ID_US1:		case AT91CAP9_ID_US1:
	pdev = &at91cap9_uart1_device;		pdev = &at91cap9_uart1_device;
	configure_usart1_pins(pins);		configure_usart1_pins(pins);
	at91_clock_associate("usart1_clk", &pdev->dev, "usart");
	break;		break;
	case AT91CAP9_ID_US2:		case AT91CAP9_ID_US2:
	pdev = &at91cap9_uart2_device;		pdev = &at91cap9_uart2_device;
	configure_usart2_pins(pins);		configure_usart2_pins(pins);
	at91_clock_associate("usart2_clk", &pdev->dev, "usart");
	break;		break;
	default:		default:
	return;		return;
	@@ -1234,8 +1218,10 @@ void __init at91_register_uart(unsigned id, unsigned portnr, unsigned pins)

	void __init at91_set_serial_console(unsigned portnr)		void __init at91_set_serial_console(unsigned portnr)
	{		{
	if (portnr < ATMEL_MAX_UART)		if (portnr < ATMEL_MAX_UART) {
	atmel_default_console_device = at91_uarts[portnr];		atmel_default_console_device = at91_uarts[portnr];
			at91cap9_set_console_clock(portnr);
			}
	}		}

	void __init at91_add_device_serial(void)		void __init at91_add_device_serial(void)