Loading arch/arm64/include/asm/cputype.h +4 −0 Original line number Diff line number Diff line Loading @@ -85,6 +85,8 @@ #define ARM_CPU_PART_KRYO3S 0x803 #define ARM_CPU_PART_KRYO3G 0x802 #define ARM_CPU_PART_CORTEX_A55 0xD05 #define ARM_CPU_PART_KRYO2XX_GOLD 0x800 #define ARM_CPU_PART_KRYO2XX_SILVER 0x801 #define APM_CPU_PART_POTENZA 0x000 Loading @@ -103,6 +105,8 @@ #define MIDR_CORTEX_A55 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A55) #define MIDR_THUNDERX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX) #define MIDR_THUNDERX_81XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX_81XX) #define MIDR_KRYO2XX_GOLD \ MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, ARM_CPU_PART_KRYO2XX_GOLD) #ifndef __ASSEMBLY__ Loading arch/arm64/kernel/cpu_errata.c +5 −0 Original line number Diff line number Diff line Loading @@ -260,6 +260,11 @@ const struct arm64_cpu_capabilities arm64_errata[] = { MIDR_ALL_VERSIONS(MIDR_KRYO3G), .enable = enable_psci_bp_hardening, }, { .capability = ARM64_HARDEN_BRANCH_PREDICTOR, MIDR_ALL_VERSIONS(MIDR_KRYO2XX_GOLD), .enable = enable_psci_bp_hardening, }, #endif { } Loading Loading
arch/arm64/include/asm/cputype.h +4 −0 Original line number Diff line number Diff line Loading @@ -85,6 +85,8 @@ #define ARM_CPU_PART_KRYO3S 0x803 #define ARM_CPU_PART_KRYO3G 0x802 #define ARM_CPU_PART_CORTEX_A55 0xD05 #define ARM_CPU_PART_KRYO2XX_GOLD 0x800 #define ARM_CPU_PART_KRYO2XX_SILVER 0x801 #define APM_CPU_PART_POTENZA 0x000 Loading @@ -103,6 +105,8 @@ #define MIDR_CORTEX_A55 MIDR_CPU_MODEL(ARM_CPU_IMP_ARM, ARM_CPU_PART_CORTEX_A55) #define MIDR_THUNDERX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX) #define MIDR_THUNDERX_81XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX_81XX) #define MIDR_KRYO2XX_GOLD \ MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, ARM_CPU_PART_KRYO2XX_GOLD) #ifndef __ASSEMBLY__ Loading
arch/arm64/kernel/cpu_errata.c +5 −0 Original line number Diff line number Diff line Loading @@ -260,6 +260,11 @@ const struct arm64_cpu_capabilities arm64_errata[] = { MIDR_ALL_VERSIONS(MIDR_KRYO3G), .enable = enable_psci_bp_hardening, }, { .capability = ARM64_HARDEN_BRANCH_PREDICTOR, MIDR_ALL_VERSIONS(MIDR_KRYO2XX_GOLD), .enable = enable_psci_bp_hardening, }, #endif { } Loading