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Commit bc5e9d6a authored by Nicolas Kaiser's avatar Nicolas Kaiser Committed by Dave Airlie
Browse files

drm/r128: fixed brace and spacing coding style issues 



Fixed brace and spacing coding style issues.

Signed-off-by: default avatarNicolas Kaiser <nikai@nikai.net>
Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
parent f2b2cb79

drivers/gpu/drm/r128/r128_cce.c

+24 −28
Original line number Diff line number Diff line
@@ -83,9 +83,8 @@ static int r128_do_pixcache_flush(drm_r128_private_t * dev_priv) 
	R128_WRITE(R128_PC_NGUI_CTLSTAT, tmp);



	for (i = 0; i < dev_priv->usec_timeout; i++) {

		if (!(R128_READ(R128_PC_NGUI_CTLSTAT) & R128_PC_BUSY)) {

		if (!(R128_READ(R128_PC_NGUI_CTLSTAT) & R128_PC_BUSY))

			return 0;

		}

		DRM_UDELAY(1);

	}
@@ -682,9 +681,8 @@ int r128_cce_stop(struct drm_device *dev, void *data, struct drm_file *file_priv 
	/* Flush any pending CCE commands.  This ensures any outstanding

	 * commands are exectuted by the engine before we turn it off.

	 */

	if (stop->flush) {

	if (stop->flush)

		r128_do_cce_flush(dev_priv);

	}



	/* If we fail to make the engine go idle, we return an error

	 * code so that the DRM ioctl wrapper can try again.
@@ -735,9 +733,8 @@ int r128_cce_idle(struct drm_device *dev, void *data, struct drm_file *file_priv 


	DEV_INIT_TEST_WITH_RETURN(dev_priv);



	if (dev_priv->cce_running) {

	if (dev_priv->cce_running)

		r128_do_cce_flush(dev_priv);

	}



	return r128_do_cce_idle(dev_priv);

}
@@ -933,9 +930,8 @@ int r128_cce_buffers(struct drm_device *dev, void *data, struct drm_file *file_p 


	d->granted_count = 0;



	if (d->request_count) {

	if (d->request_count)

		ret = r128_cce_get_buffers(dev, file_priv, d);

	}



	return ret;

}

drivers/gpu/drm/r128/r128_drv.h

+59 −63
Original line number Diff line number Diff line
@@ -452,7 +452,8 @@ do { \ 
	drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;		\

	if (sarea_priv->last_dispatch >= R128_MAX_VB_AGE) {		\

		int __ret = r128_do_cce_idle(dev_priv);			\

		if ( __ret ) return __ret;				\

		if (__ret)						\

			return __ret;					\

		sarea_priv->last_dispatch = 0;				\

		r128_freelist_reset(dev);				\

	}								\
@@ -473,9 +474,8 @@ do { \ 
	int write, _nr; unsigned int tail_mask; volatile u32 *ring;



#define BEGIN_RING(n) do {						\

	if ( R128_VERBOSE ) {						\

	if (R128_VERBOSE)						\

		DRM_INFO("BEGIN_RING(%d)\n", (n));			\

	}								\

	if (dev_priv->ring.space <= (n) * sizeof(u32)) {		\

		COMMIT_RING();						\

		r128_wait_ring(dev_priv, (n) * sizeof(u32));		\
@@ -494,39 +494,35 @@ do { \ 
#define R128_BROKEN_CCE	1



#define ADVANCE_RING() do {						\

	if ( R128_VERBOSE ) {						\

	if (R128_VERBOSE)						\

		DRM_INFO("ADVANCE_RING() wr=0x%06x tail=0x%06x\n",	\

			 write, dev_priv->ring.tail);			\

	}								\

	if ( R128_BROKEN_CCE && write < 32 ) {				\

	if (R128_BROKEN_CCE && write < 32)				\

		memcpy(dev_priv->ring.end,				\

		       dev_priv->ring.start,				\

		       write * sizeof(u32));				\

	}								\

	if (((dev_priv->ring.tail + _nr) & tail_mask) != write) {	\

	if (((dev_priv->ring.tail + _nr) & tail_mask) != write)		\

		DRM_ERROR(						\

			"ADVANCE_RING(): mismatch: nr: %x write: %x line: %d\n",	\

			((dev_priv->ring.tail + _nr) & tail_mask),	\

			write, __LINE__);				\

	} else								\

	else								\

		dev_priv->ring.tail = write;				\

} while (0)



#define COMMIT_RING() do {						\

	if ( R128_VERBOSE ) {						\

	if (R128_VERBOSE)						\

		DRM_INFO("COMMIT_RING() tail=0x%06x\n",			\

			 dev_priv->ring.tail);				\

	}								\

	DRM_MEMORYBARRIER();						\

	R128_WRITE(R128_PM4_BUFFER_DL_WPTR, dev_priv->ring.tail);	\

	R128_READ(R128_PM4_BUFFER_DL_WPTR);				\

} while (0)



#define OUT_RING(x) do {						\

	if ( R128_VERBOSE ) {						\

	if (R128_VERBOSE)						\

		DRM_INFO("   OUT_RING( 0x%08x ) at 0x%x\n",		\

			 (unsigned int)(x), write);			\

	}								\

	ring[write++] = cpu_to_le32(x);					\

	write &= tail_mask;						\

} while (0)

drivers/gpu/drm/r128/r128_state.c

+53 −68
Original line number Diff line number Diff line
@@ -187,9 +187,8 @@ static __inline__ void r128_emit_tex0(drm_r128_private_t * dev_priv) 
	OUT_RING(tex->tex_cntl);

	OUT_RING(tex->tex_combine_cntl);

	OUT_RING(ctx->tex_size_pitch_c);

	for (i = 0; i < R128_MAX_TEXTURE_LEVELS; i++) {

	for (i = 0; i < R128_MAX_TEXTURE_LEVELS; i++)

		OUT_RING(tex->tex_offset[i]);

	}



	OUT_RING(CCE_PACKET0(R128_CONSTANT_COLOR_C, 1));

	OUT_RING(ctx->constant_color_c);
@@ -211,9 +210,8 @@ static __inline__ void r128_emit_tex1(drm_r128_private_t * dev_priv) 
	OUT_RING(CCE_PACKET0(R128_SEC_TEX_CNTL_C, 1 + R128_MAX_TEXTURE_LEVELS));

	OUT_RING(tex->tex_cntl);

	OUT_RING(tex->tex_combine_cntl);

	for (i = 0; i < R128_MAX_TEXTURE_LEVELS; i++) {

	for (i = 0; i < R128_MAX_TEXTURE_LEVELS; i++)

		OUT_RING(tex->tex_offset[i]);

	}



	OUT_RING(CCE_PACKET0(R128_SEC_TEXTURE_BORDER_COLOR_C, 0));

	OUT_RING(tex->tex_border_color);
@@ -323,12 +321,11 @@ static void r128_clear_box(drm_r128_private_t * dev_priv, 


static void r128_cce_performance_boxes(drm_r128_private_t *dev_priv)

{

	if (atomic_read(&dev_priv->idle_count) == 0) {

	if (atomic_read(&dev_priv->idle_count) == 0)

		r128_clear_box(dev_priv, 64, 4, 8, 8, 0, 255, 0);

	} else {

	else

		atomic_set(&dev_priv->idle_count, 0);

}

}



#endif
@@ -542,11 +539,10 @@ static void r128_cce_dispatch_flip(struct drm_device * dev) 
	R128_WAIT_UNTIL_PAGE_FLIPPED();

	OUT_RING(CCE_PACKET0(R128_CRTC_OFFSET, 0));



	if (dev_priv->current_page == 0) {

	if (dev_priv->current_page == 0)

		OUT_RING(dev_priv->back_offset);

	} else {

	else

		OUT_RING(dev_priv->front_offset);

	}



	ADVANCE_RING();
@@ -585,9 +581,8 @@ static void r128_cce_dispatch_vertex(struct drm_device * dev, struct drm_buf * b 
	if (buf->used) {

		buf_priv->dispatched = 1;



		if (sarea_priv->dirty & ~R128_UPLOAD_CLIPRECTS) {

		if (sarea_priv->dirty & ~R128_UPLOAD_CLIPRECTS)

			r128_emit_state(dev_priv);

		}



		do {

			/* Emit the next set of up to three cliprects */
@@ -713,9 +708,8 @@ static void r128_cce_dispatch_indices(struct drm_device * dev, 
	if (start != end) {

		buf_priv->dispatched = 1;



		if (sarea_priv->dirty & ~R128_UPLOAD_CLIPRECTS) {

		if (sarea_priv->dirty & ~R128_UPLOAD_CLIPRECTS)

			r128_emit_state(dev_priv);

		}



		dwords = (end - start + 3) / sizeof(u32);
@@ -902,12 +896,10 @@ static int r128_cce_dispatch_write_span(struct drm_device * dev, 
	if (count > 4096 || count <= 0)

		return -EMSGSIZE;



	if (DRM_COPY_FROM_USER(&x, depth->x, sizeof(x))) {

	if (DRM_COPY_FROM_USER(&x, depth->x, sizeof(x)))

		return -EFAULT;

	}

	if (DRM_COPY_FROM_USER(&y, depth->y, sizeof(y))) {

	if (DRM_COPY_FROM_USER(&y, depth->y, sizeof(y)))

		return -EFAULT;

	}



	buffer_size = depth->n * sizeof(u32);

	buffer = kmalloc(buffer_size, GFP_KERNEL);
@@ -1001,9 +993,8 @@ static int r128_cce_dispatch_write_pixels(struct drm_device * dev, 
	xbuf_size = count * sizeof(*x);

	ybuf_size = count * sizeof(*y);

	x = kmalloc(xbuf_size, GFP_KERNEL);

	if (x == NULL) {

	if (x == NULL)

		return -ENOMEM;

	}

	y = kmalloc(ybuf_size, GFP_KERNEL);

	if (y == NULL) {

		kfree(x);
@@ -1117,12 +1108,10 @@ static int r128_cce_dispatch_read_span(struct drm_device * dev, 
	if (count > 4096 || count <= 0)

		return -EMSGSIZE;



	if (DRM_COPY_FROM_USER(&x, depth->x, sizeof(x))) {

	if (DRM_COPY_FROM_USER(&x, depth->x, sizeof(x)))

		return -EFAULT;

	}

	if (DRM_COPY_FROM_USER(&y, depth->y, sizeof(y))) {

	if (DRM_COPY_FROM_USER(&y, depth->y, sizeof(y)))

		return -EFAULT;

	}



	BEGIN_RING(7);
@@ -1161,16 +1150,14 @@ static int r128_cce_dispatch_read_pixels(struct drm_device * dev, 
	if (count > 4096 || count <= 0)

		return -EMSGSIZE;



	if (count > dev_priv->depth_pitch) {

	if (count > dev_priv->depth_pitch)

		count = dev_priv->depth_pitch;

	}



	xbuf_size = count * sizeof(*x);

	ybuf_size = count * sizeof(*y);

	x = kmalloc(xbuf_size, GFP_KERNEL);

	if (x == NULL) {

	if (x == NULL)

		return -ENOMEM;

	}

	y = kmalloc(ybuf_size, GFP_KERNEL);

	if (y == NULL) {

		kfree(x);
@@ -1230,9 +1217,8 @@ static void r128_cce_dispatch_stipple(struct drm_device * dev, u32 * stipple) 
	BEGIN_RING(33);



	OUT_RING(CCE_PACKET0(R128_BRUSH_DATA0, 31));

	for (i = 0; i < 32; i++) {

	for (i = 0; i < 32; i++)

		OUT_RING(stipple[i]);

	}



	ADVANCE_RING();

}
@@ -1649,11 +1635,10 @@ void r128_driver_preclose(struct drm_device * dev, struct drm_file *file_priv) 
{

	if (dev->dev_private) {

		drm_r128_private_t *dev_priv = dev->dev_private;

		if (dev_priv->page_flipping) {

		if (dev_priv->page_flipping)

			r128_do_cleanup_pageflip(dev);

	}

}

}



void r128_driver_lastclose(struct drm_device *dev)

{

drivers/gpu/drm/r128/r128_irq.c

+2 −2

File changed.

Contains only whitespace changes.

drivers/gpu/drm/r128/r128_drv.c

+1 −1

File changed.

Contains only whitespace changes.