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Commit bc20aa48 authored by David Cohen's avatar David Cohen Committed by H. Peter Anvin
Browse files

x86, intel-mid: Add Merrifield platform support 



This code was partially based on Mark Brown's previous work.

Signed-off-by: default avatarDavid Cohen <david.a.cohen@linux.intel.com>
Link: http://lkml.kernel.org/r/1387224459-25746-4-git-send-email-david.a.cohen@linux.intel.com


Signed-off-by: default avatarFei Yang <fei.yang@intel.com>
Cc: Mark F. Brown <mark.f.brown@intel.com>
Cc: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com>
Signed-off-by: default avatarH. Peter Anvin <hpa@linux.intel.com>
parent 85611e3f

arch/x86/include/asm/intel-mid.h

+2 −0
Original line number Diff line number Diff line
@@ -52,6 +52,7 @@ enum intel_mid_cpu_type { 
	/* 1 was Moorestown */

	INTEL_MID_CPU_CHIP_PENWELL = 2,

	INTEL_MID_CPU_CHIP_CLOVERVIEW,

	INTEL_MID_CPU_CHIP_TANGIER,

};



extern enum intel_mid_cpu_type __intel_mid_cpu_chip;
@@ -82,6 +83,7 @@ struct intel_mid_ops { 
#define INTEL_MID_OPS_INIT {\

	DECLARE_INTEL_MID_OPS_INIT(penwell, INTEL_MID_CPU_CHIP_PENWELL), \

	DECLARE_INTEL_MID_OPS_INIT(cloverview, INTEL_MID_CPU_CHIP_CLOVERVIEW), \

	DECLARE_INTEL_MID_OPS_INIT(tangier, INTEL_MID_CPU_CHIP_TANGIER) \

};



#ifdef CONFIG_X86_INTEL_MID

arch/x86/pci/intel_mid_pci.c

+5 −1
Original line number Diff line number Diff line
@@ -31,6 +31,7 @@ 
#include <asm/pci_x86.h>

#include <asm/hw_irq.h>

#include <asm/io_apic.h>

#include <asm/intel-mid.h>



#define PCIE_CAP_OFFSET	0x100
@@ -219,6 +220,9 @@ static int intel_mid_pci_irq_enable(struct pci_dev *dev) 
	irq_attr.ioapic = mp_find_ioapic(dev->irq);

	irq_attr.ioapic_pin = dev->irq;

	irq_attr.trigger = 1; /* level */

	if (intel_mid_identify_cpu() == INTEL_MID_CPU_CHIP_TANGIER)

		irq_attr.polarity = 0; /* active high */

	else

		irq_attr.polarity = 1; /* active low */

	io_apic_set_pci_routing(&dev->dev, dev->irq, &irq_attr);

arch/x86/platform/intel-mid/Makefile

+1 −1
Original line number Diff line number Diff line 
obj-$(CONFIG_X86_INTEL_MID) += intel-mid.o intel_mid_vrtc.o mfld.o

obj-$(CONFIG_X86_INTEL_MID) += intel-mid.o intel_mid_vrtc.o mfld.o mrfl.o

obj-$(CONFIG_EARLY_PRINTK_INTEL_MID) += early_printk_intel_mid.o



# SFI specific code

arch/x86/platform/intel-mid/intel-mid.c

+4 −0
Original line number Diff line number Diff line
@@ -116,6 +116,10 @@ static void intel_mid_arch_setup(void) 
	case 0x35:

		__intel_mid_cpu_chip = INTEL_MID_CPU_CHIP_CLOVERVIEW;

		break;

	case 0x3C:

	case 0x4A:

		__intel_mid_cpu_chip = INTEL_MID_CPU_CHIP_TANGIER;

		break;

	case 0x27:

	default:

		__intel_mid_cpu_chip = INTEL_MID_CPU_CHIP_PENWELL;

arch/x86/platform/intel-mid/intel_mid_weak_decls.h

+1 −0
Original line number Diff line number Diff line
@@ -16,3 +16,4 @@ 
 */

extern void * __cpuinit get_penwell_ops(void) __attribute__((weak));

extern void * __cpuinit get_cloverview_ops(void) __attribute__((weak));

extern void * __init get_tangier_ops(void) __attribute__((weak));