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Commit bc0f424f authored by Paul Mundt's avatar Paul Mundt
Browse files

Merge branch 'sh/g3-prep'

parents a2159b52 225c9a8d

arch/sh/boards/board-ap325rxa.c

+1 −1
Original line number Diff line number Diff line
@@ -20,7 +20,7 @@ 
#include <linux/smc911x.h>

#include <media/soc_camera_platform.h>

#include <media/sh_mobile_ceu.h>

#include <asm/sh_mobile_lcdc.h>

#include <video/sh_mobile_lcdc.h>

#include <asm/io.h>

#include <asm/clock.h>

arch/sh/boards/mach-migor/lcd_qvga.c

+1 −1
Original line number Diff line number Diff line
@@ -17,7 +17,7 @@ 
#include <linux/init.h>

#include <linux/kernel.h>

#include <linux/module.h>

#include <asm/sh_mobile_lcdc.h>

#include <video/sh_mobile_lcdc.h>

#include <asm/migor.h>



/* LCD Module is a PH240320T according to board schematics. This module

arch/sh/boards/mach-migor/setup.c

+1 −1
Original line number Diff line number Diff line
@@ -19,11 +19,11 @@ 
#include <linux/clk.h>

#include <media/soc_camera_platform.h>

#include <media/sh_mobile_ceu.h>

#include <video/sh_mobile_lcdc.h>

#include <asm/clock.h>

#include <asm/machvec.h>

#include <asm/io.h>

#include <asm/sh_keysc.h>

#include <asm/sh_mobile_lcdc.h>

#include <asm/migor.h>



/* Address     IRQ  Size  Bus  Description

arch/sh/include/asm/hw_irq.h

+2 −90
Original line number Diff line number Diff line
@@ -2,6 +2,7 @@ 
#define __ASM_SH_HW_IRQ_H



#include <linux/init.h>

#include <linux/sh_intc.h>

#include <asm/atomic.h>



extern atomic_t irq_err_count;
@@ -23,101 +24,12 @@ struct ipr_desc { 


void register_ipr_controller(struct ipr_desc *);



typedef unsigned char intc_enum;



struct intc_vect {

	intc_enum enum_id;

	unsigned short vect;

};



#define INTC_VECT(enum_id, vect) { enum_id, vect }

#define INTC_IRQ(enum_id, irq) INTC_VECT(enum_id, irq2evt(irq))



struct intc_group {

	intc_enum enum_id;

	intc_enum enum_ids[32];

};



#define INTC_GROUP(enum_id, ids...) { enum_id, { ids } }



struct intc_mask_reg {

	unsigned long set_reg, clr_reg, reg_width;

	intc_enum enum_ids[32];

#ifdef CONFIG_SMP

	unsigned long smp;

#endif

};



struct intc_prio_reg {

	unsigned long set_reg, clr_reg, reg_width, field_width;

	intc_enum enum_ids[16];

#ifdef CONFIG_SMP

	unsigned long smp;

#endif

};



struct intc_sense_reg {

	unsigned long reg, reg_width, field_width;

	intc_enum enum_ids[16];

};



#ifdef CONFIG_SMP

#define INTC_SMP(stride, nr) .smp = (stride) | ((nr) << 8)

#else

#define INTC_SMP(stride, nr)

#endif



struct intc_desc {

	struct intc_vect *vectors;

	unsigned int nr_vectors;

	struct intc_group *groups;

	unsigned int nr_groups;

	struct intc_mask_reg *mask_regs;

	unsigned int nr_mask_regs;

	struct intc_prio_reg *prio_regs;

	unsigned int nr_prio_regs;

	struct intc_sense_reg *sense_regs;

	unsigned int nr_sense_regs;

	char *name;

#if defined(CONFIG_CPU_SH3) || defined(CONFIG_CPU_SH4A)

	struct intc_mask_reg *ack_regs;

	unsigned int nr_ack_regs;

#endif

};



#define _INTC_ARRAY(a) a, sizeof(a)/sizeof(*a)

#define DECLARE_INTC_DESC(symbol, chipname, vectors, groups,		\

	mask_regs, prio_regs, sense_regs)				\

struct intc_desc symbol __initdata = {					\

	_INTC_ARRAY(vectors), _INTC_ARRAY(groups),			\

	_INTC_ARRAY(mask_regs), _INTC_ARRAY(prio_regs),			\

	_INTC_ARRAY(sense_regs),					\

	chipname,							\

}



#if defined(CONFIG_CPU_SH3) || defined(CONFIG_CPU_SH4A)

#define DECLARE_INTC_DESC_ACK(symbol, chipname, vectors, groups,	\

	mask_regs, prio_regs, sense_regs, ack_regs)			\

struct intc_desc symbol __initdata = {					\

	_INTC_ARRAY(vectors), _INTC_ARRAY(groups),			\

	_INTC_ARRAY(mask_regs), _INTC_ARRAY(prio_regs),			\

	_INTC_ARRAY(sense_regs),					\

	chipname,							\

	_INTC_ARRAY(ack_regs),						\

}

#endif



void __init register_intc_controller(struct intc_desc *desc);

int intc_set_priority(unsigned int irq, unsigned int prio);



void __init plat_irq_setup(void);

#ifdef CONFIG_CPU_SH3

void __init plat_irq_setup_sh3(void);

#endif

void __init plat_irq_setup_pins(int mode);



enum { IRQ_MODE_IRQ, IRQ_MODE_IRQ7654, IRQ_MODE_IRQ3210,

       IRQ_MODE_IRL7654_MASK, IRQ_MODE_IRL3210_MASK,

       IRQ_MODE_IRL7654, IRQ_MODE_IRL3210 };

void __init plat_irq_setup_pins(int mode);



#endif /* __ASM_SH_HW_IRQ_H */

arch/sh/include/asm/io.h

+36 −41
Original line number Diff line number Diff line
@@ -101,44 +101,33 @@ 
#define outsw		__outsw

#define outsl		__outsl



#define __raw_readb(a)		__readb((void __iomem *)(a))

#define __raw_readw(a)		__readw((void __iomem *)(a))

#define __raw_readl(a)		__readl((void __iomem *)(a))

#define __raw_writeb(v, a)	__writeb(v, (void __iomem *)(a))

#define __raw_writew(v, a)	__writew(v, (void __iomem *)(a))

#define __raw_writel(v, a)	__writel(v, (void __iomem *)(a))

#define __raw_writeb(v,a)	(__chk_io_ptr(a), *(volatile unsigned char __force  *)(a) = (v))

#define __raw_writew(v,a)	(__chk_io_ptr(a), *(volatile unsigned short __force *)(a) = (v))

#define __raw_writel(v,a)	(__chk_io_ptr(a), *(volatile unsigned int __force   *)(a) = (v))



void __raw_writesl(unsigned long addr, const void *data, int longlen);

void __raw_readsl(unsigned long addr, void *data, int longlen);

#define __raw_readb(a)		(__chk_io_ptr(a), *(volatile unsigned char __force  *)(a))

#define __raw_readw(a)		(__chk_io_ptr(a), *(volatile unsigned short __force *)(a))

#define __raw_readl(a)		(__chk_io_ptr(a), *(volatile unsigned int __force   *)(a))



void __raw_writesl(void __iomem *addr, const void *data, int longlen);

void __raw_readsl(const void __iomem *addr, void *data, int longlen);



/*

 * The platform header files may define some of these macros to use

 * the inlined versions where appropriate.  These macros may also be

 * redefined by userlevel programs.

 */

#ifdef __readb

# define readb(a)	({ unsigned int r_ = __raw_readb(a); mb(); r_; })

#endif

#ifdef __raw_readw

# define readw(a)	({ unsigned int r_ = __raw_readw(a); mb(); r_; })

#endif

#ifdef __raw_readl

# define readl(a)	({ unsigned int r_ = __raw_readl(a); mb(); r_; })

#endif

#define readb(a)	({ unsigned int r_ = __readb(a); mb(); r_; })

#define readw(a)	({ unsigned int r_ = __readw(a); mb(); r_; })

#define readl(a)	({ unsigned int r_ = __readl(a); mb(); r_; })



#ifdef __raw_writeb

# define writeb(v,a)	({ __raw_writeb((v),(a)); mb(); })

#endif

#ifdef __raw_writew

# define writew(v,a)	({ __raw_writew((v),(a)); mb(); })

#endif

#ifdef __raw_writel

# define writel(v,a)	({ __raw_writel((v),(a)); mb(); })

#endif

#define writeb(v,a)	({ __writeb((v),(a)); mb(); })

#define writew(v,a)	({ __writew((v),(a)); mb(); })

#define writel(v,a)	({ __writel((v),(a)); mb(); })



#define __BUILD_MEMORY_STRING(bwlq, type)				\

									\

static inline void writes##bwlq(volatile void __iomem *mem,		\

static inline void __raw_writes##bwlq(volatile void __iomem *mem,	\

				const void *addr, unsigned int count)	\

{									\

	const volatile type *__addr = addr;				\
@@ -149,8 +138,8 @@ static inline void writes##bwlq(volatile void __iomem *mem, \ 
	}								\

}									\

									\

static inline void reads##bwlq(volatile void __iomem *mem, void *addr,	\

			       unsigned int count)			\

static inline void __raw_reads##bwlq(volatile void __iomem *mem,	\

			       void *addr, unsigned int count)		\

{									\

	volatile type *__addr = addr;					\

									\
@@ -162,7 +151,13 @@ static inline void reads##bwlq(volatile void __iomem *mem, void *addr, \ 


__BUILD_MEMORY_STRING(b, u8)

__BUILD_MEMORY_STRING(w, u16)



#define writesb	__raw_writesb

#define writesw	__raw_writesw

#define writesl __raw_writesl



#define readsb	__raw_readsb

#define readsw	__raw_readsw

#define readsl  __raw_readsl



#define readb_relaxed(a) readb(a)
@@ -170,25 +165,25 @@ __BUILD_MEMORY_STRING(w, u16) 
#define readl_relaxed(a) readl(a)



/* Simple MMIO */

#define ioread8(a)		readb(a)

#define ioread16(a)		readw(a)

#define ioread8(a)		__raw_readb(a)

#define ioread16(a)		__raw_readw(a)

#define ioread16be(a)		be16_to_cpu(__raw_readw((a)))

#define ioread32(a)		readl(a)

#define ioread32(a)		__raw_readl(a)

#define ioread32be(a)		be32_to_cpu(__raw_readl((a)))



#define iowrite8(v,a)		writeb((v),(a))

#define iowrite16(v,a)		writew((v),(a))

#define iowrite8(v,a)		__raw_writeb((v),(a))

#define iowrite16(v,a)		__raw_writew((v),(a))

#define iowrite16be(v,a)	__raw_writew(cpu_to_be16((v)),(a))

#define iowrite32(v,a)		writel((v),(a))

#define iowrite32(v,a)		__raw_writel((v),(a))

#define iowrite32be(v,a)	__raw_writel(cpu_to_be32((v)),(a))



#define ioread8_rep(a, d, c)	readsb((a), (d), (c))

#define ioread16_rep(a, d, c)	readsw((a), (d), (c))

#define ioread32_rep(a, d, c)	readsl((a), (d), (c))

#define ioread8_rep(a, d, c)	__raw_readsb((a), (d), (c))

#define ioread16_rep(a, d, c)	__raw_readsw((a), (d), (c))

#define ioread32_rep(a, d, c)	__raw_readsl((a), (d), (c))



#define iowrite8_rep(a, s, c)	writesb((a), (s), (c))

#define iowrite16_rep(a, s, c)	writesw((a), (s), (c))

#define iowrite32_rep(a, s, c)	writesl((a), (s), (c))

#define iowrite8_rep(a, s, c)	__raw_writesb((a), (s), (c))

#define iowrite16_rep(a, s, c)	__raw_writesw((a), (s), (c))

#define iowrite32_rep(a, s, c)	__raw_writesl((a), (s), (c))



#define mmiowb()	wmb()	/* synco on SH-4A, otherwise a nop */