Commit bac7f4c1 authored Oct 20, 2015 by Masahiro Yamada Committed by Linus Walleij Oct 27, 2015

pinctrl: uniphier: set input-enable before pin-muxing



While IECTRL is disabled, input signals are pulled-down internally.
If pin-muxing is set up first, glitch signals (Low to High transition)
might be input to hardware blocks.

Bad case scenario:
[1] The hardware block is already running before pinctrl is handled.
   (the reset is de-asserted by default or by a firmware, for example)
[2] The pin-muxing is set up.  The input signals to hardware block
    are pulled-down by the chip-internal biasing.
[3] The pins are input-enabled.  The signals from the board reach the
    hardware block.

Actually, one invalid character is input to the UART blocks for such
SoCs as PH1-LD4, PH1-sLD8, where UART devices start to run at the
power on reset.

To avoid such problems, pins should be input-enabled before muxing.

Fixes: 6e908892 ("pinctrl: UniPhier: add UniPhier pinctrl core support")
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Reported-by: Dai Okamura <okamura.dai@socionext.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>

parent e0548004

drivers/pinctrl/uniphier/pinctrl-uniphier-core.c

+7 −3

Original line number	Diff line number	Diff line
		@@ -539,6 +539,12 @@ static int uniphier_pmx_set_one_mux(struct pinctrl_dev *pctldev, unsigned pin,
		unsigned reg, reg_end, shift, mask;
		int ret;

		/* some pins need input-enabling */
		ret = uniphier_conf_pin_input_enable(pctldev,
		&pctldev->desc->pins[pin], 1);
		if (ret)
		return ret;

		reg = UNIPHIER_PINCTRL_PINMUX_BASE + pin * mux_bits / 32 * reg_stride;
		reg_end = reg + reg_stride;
		shift = pin * mux_bits % 32;
		@@ -563,9 +569,7 @@ static int uniphier_pmx_set_one_mux(struct pinctrl_dev *pctldev, unsigned pin,
		return ret;
		}

		/* some pins need input-enabling */
		return uniphier_conf_pin_input_enable(pctldev,
		&pctldev->desc->pins[pin], 1);
		return 0;
		}

		static int uniphier_pmx_set_mux(struct pinctrl_dev *pctldev,