Loading drivers/platform/msm/ipa/ipa_clients/ipa_usb.c +6 −1 Original line number Diff line number Diff line Loading @@ -1336,7 +1336,12 @@ static int ipa3_usb_request_xdci_channel( chan_params.chan_params.ring_base_addr = params->xfer_ring_base_addr_iova; chan_params.chan_params.ring_base_vaddr = NULL; if (ipa3_ctx->ipa_hw_type >= IPA_HW_v4_0) chan_params.chan_params.use_db_eng = GSI_CHAN_DIRECT_MODE; else chan_params.chan_params.use_db_eng = GSI_CHAN_DB_MODE; chan_params.chan_params.prefetch_mode = ipa_get_ep_prefetch_mode(chan_params.client); chan_params.chan_params.max_prefetch = GSI_ONE_PREFETCH_SEG; if (params->dir == GSI_CHAN_DIR_FROM_GSI) chan_params.chan_params.low_weight = Loading drivers/platform/msm/ipa/ipa_v3/ipa_dp.c +12 −2 Original line number Diff line number Diff line Loading @@ -3701,8 +3701,13 @@ static int ipa_gsi_setup_channel(struct ipa_sys_connect_params *in, ep->gsi_mem_info.chan_ring_base_vaddr = gsi_channel_props.ring_base_vaddr; if (ipa3_ctx->ipa_hw_type >= IPA_HW_v4_0) gsi_channel_props.use_db_eng = GSI_CHAN_DIRECT_MODE; else gsi_channel_props.use_db_eng = GSI_CHAN_DB_MODE; gsi_channel_props.max_prefetch = GSI_ONE_PREFETCH_SEG; gsi_channel_props.prefetch_mode = ipa_get_ep_prefetch_mode(ep->client); if (ep->client == IPA_CLIENT_APPS_CMD_PROD) gsi_channel_props.low_weight = IPA_GSI_MAX_CH_LOW_WEIGHT; else Loading Loading @@ -3941,7 +3946,12 @@ int ipa_gsi_ch20_wa(void) dma_alloc_coherent(ipa3_ctx->pdev, gsi_channel_props.ring_len, &dma_addr, 0); gsi_channel_props.ring_base_addr = dma_addr; if (ipa3_ctx->ipa_hw_type >= IPA_HW_v4_0) gsi_channel_props.use_db_eng = GSI_CHAN_DIRECT_MODE; else gsi_channel_props.use_db_eng = GSI_CHAN_DB_MODE; gsi_channel_props.max_prefetch = GSI_ONE_PREFETCH_SEG; gsi_channel_props.low_weight = 1; gsi_channel_props.err_cb = ipa_gsi_chan_err_cb; Loading drivers/platform/msm/ipa/ipa_v3/ipa_i.h +2 −0 Original line number Diff line number Diff line Loading @@ -2258,6 +2258,8 @@ int ipa3_remove_interrupt_handler(enum ipa_irq_type interrupt); */ int ipa3_get_ep_mapping(enum ipa_client_type client); enum gsi_prefetch_mode ipa_get_ep_prefetch_mode(enum ipa_client_type client); bool ipa3_is_ready(void); void ipa3_proxy_clk_vote(void); Loading drivers/platform/msm/ipa/ipa_v3/ipa_mhi.c +18 −4 Original line number Diff line number Diff line Loading @@ -198,6 +198,7 @@ static int ipa_mhi_start_gsi_channel(enum ipa_client_type client, union __packed gsi_channel_scratch ch_scratch; struct ipa3_ep_context *ep; const struct ipa_gsi_ep_config *ep_cfg; bool burst_mode_enabled = false; IPA_MHI_FUNC_ENTRY(); Loading Loading @@ -280,8 +281,21 @@ static int ipa_mhi_start_gsi_channel(enum ipa_client_type client, ch_props.ring_len = params->ch_ctx_host->rlen; ch_props.ring_base_addr = IPA_MHI_HOST_ADDR_COND( params->ch_ctx_host->rbase); if (params->ch_ctx_host->brstmode == IPA_MHI_BURST_MODE_DEFAULT || params->ch_ctx_host->brstmode == IPA_MHI_BURST_MODE_ENABLE) { burst_mode_enabled = true; } if (ipa3_ctx->ipa_hw_type >= IPA_HW_v4_0 && !burst_mode_enabled) ch_props.use_db_eng = GSI_CHAN_DIRECT_MODE; else ch_props.use_db_eng = GSI_CHAN_DB_MODE; ch_props.max_prefetch = GSI_ONE_PREFETCH_SEG; ch_props.prefetch_mode = ipa_get_ep_prefetch_mode(client); ch_props.low_weight = 1; ch_props.err_cb = params->ch_err_cb; ch_props.chan_user_data = params->channel; Loading @@ -307,9 +321,9 @@ static int ipa_mhi_start_gsi_channel(enum ipa_client_type client, ch_scratch.mhi.outstanding_threshold = 0; } ch_scratch.mhi.oob_mod_threshold = 4; if (params->ch_ctx_host->brstmode == IPA_MHI_BURST_MODE_DEFAULT || params->ch_ctx_host->brstmode == IPA_MHI_BURST_MODE_ENABLE) { ch_scratch.mhi.burst_mode_enabled = true; if (burst_mode_enabled) { ch_scratch.mhi.burst_mode_enabled = burst_mode_enabled; ch_scratch.mhi.polling_configuration = ipa3_mhi_get_ch_poll_cfg(client, params->ch_ctx_host, (ch_props.ring_len / ch_props.re_size)); Loading drivers/platform/msm/ipa/ipa_v3/ipa_utils.c +80 −58 Original line number Diff line number Diff line Loading @@ -1126,86 +1126,86 @@ static const struct ipa_ep_configuration ipa3_ep_mapping true, IPA_DPS_HPS_REP_SEQ_TYPE_2PKT_PROC_PASS_NO_DEC_UCP_DMAP, QMB_MASTER_SELECT_DDR, { 6, 2, 8, 16, IPA_EE_UC } }, { 6, 2, 8, 16, IPA_EE_UC, GSI_USE_PREFETCH_BUFS } }, [IPA_4_0][IPA_CLIENT_USB_PROD] = { true, IPA_v4_0_GROUP_UL_DL, true, IPA_DPS_HPS_REP_SEQ_TYPE_2PKT_PROC_PASS_NO_DEC_UCP_DMAP, QMB_MASTER_SELECT_DDR, { 0, 8, 8, 16, IPA_EE_AP } }, { 0, 8, 8, 16, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY } }, [IPA_4_0][IPA_CLIENT_APPS_LAN_PROD] = { true, IPA_v4_0_GROUP_UL_DL, false, IPA_DPS_HPS_SEQ_TYPE_2ND_PKT_PROCESS_PASS_NO_DEC_UCP, QMB_MASTER_SELECT_DDR, { 8, 10, 8, 16, IPA_EE_AP } }, { 8, 10, 8, 16, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY } }, [IPA_4_0][IPA_CLIENT_APPS_WAN_PROD] = { true, IPA_v4_0_GROUP_UL_DL, true, IPA_DPS_HPS_REP_SEQ_TYPE_2PKT_PROC_PASS_NO_DEC_UCP_DMAP, QMB_MASTER_SELECT_DDR, { 2, 3, 16, 32, IPA_EE_AP } }, { 2, 3, 16, 32, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY } }, [IPA_4_0][IPA_CLIENT_APPS_CMD_PROD] = { true, IPA_v4_0_GROUP_UL_DL, false, IPA_DPS_HPS_SEQ_TYPE_DMA_ONLY, QMB_MASTER_SELECT_DDR, { 5, 4, 20, 24, IPA_EE_AP } }, { 5, 4, 20, 24, IPA_EE_AP, GSI_USE_PREFETCH_BUFS } }, [IPA_4_0][IPA_CLIENT_ODU_PROD] = { true, IPA_v4_0_GROUP_UL_DL, true, IPA_DPS_HPS_REP_SEQ_TYPE_2PKT_PROC_PASS_NO_DEC_UCP_DMAP, QMB_MASTER_SELECT_DDR, { 1, 0, 8, 16, IPA_EE_AP } }, { 1, 0, 8, 16, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY } }, [IPA_4_0][IPA_CLIENT_ETHERNET_PROD] = { true, IPA_v4_0_GROUP_UL_DL, true, IPA_DPS_HPS_REP_SEQ_TYPE_2PKT_PROC_PASS_NO_DEC_UCP_DMAP, QMB_MASTER_SELECT_DDR, { 9, 0, 8, 16, IPA_EE_UC } }, { 9, 0, 8, 16, IPA_EE_UC, GSI_USE_PREFETCH_BUFS } }, [IPA_4_0][IPA_CLIENT_Q6_WAN_PROD] = { true, IPA_v4_0_GROUP_UL_DL, true, IPA_DPS_HPS_SEQ_TYPE_2ND_PKT_PROCESS_PASS_NO_DEC_UCP, QMB_MASTER_SELECT_DDR, { 3, 0, 16, 32, IPA_EE_Q6 } }, { 3, 0, 16, 32, IPA_EE_Q6, GSI_USE_PREFETCH_BUFS } }, [IPA_4_0][IPA_CLIENT_Q6_CMD_PROD] = { true, IPA_v4_0_GROUP_UL_DL, false, IPA_DPS_HPS_SEQ_TYPE_PKT_PROCESS_NO_DEC_UCP, QMB_MASTER_SELECT_DDR, { 4, 1, 20, 24, IPA_EE_Q6 } }, { 4, 1, 20, 24, IPA_EE_Q6, GSI_USE_PREFETCH_BUFS } }, /* Only for test purpose */ [IPA_4_0][IPA_CLIENT_TEST_PROD] = { true, IPA_v4_0_GROUP_UL_DL, true, IPA_DPS_HPS_SEQ_TYPE_2ND_PKT_PROCESS_PASS_NO_DEC_UCP, QMB_MASTER_SELECT_DDR, {0, 8, 8, 16, IPA_EE_AP } }, {0, 8, 8, 16, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY } }, [IPA_4_0][IPA_CLIENT_TEST1_PROD] = { true, IPA_v4_0_GROUP_UL_DL, true, IPA_DPS_HPS_SEQ_TYPE_2ND_PKT_PROCESS_PASS_NO_DEC_UCP, QMB_MASTER_SELECT_DDR, {0, 8, 8, 16, IPA_EE_AP } }, {0, 8, 8, 16, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY } }, [IPA_4_0][IPA_CLIENT_TEST2_PROD] = { true, IPA_v4_0_GROUP_UL_DL, true, IPA_DPS_HPS_SEQ_TYPE_2ND_PKT_PROCESS_PASS_NO_DEC_UCP, QMB_MASTER_SELECT_DDR, { 1, 0, 8, 16, IPA_EE_AP } }, { 1, 0, 8, 16, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY } }, [IPA_4_0][IPA_CLIENT_TEST3_PROD] = { true, IPA_v4_0_GROUP_UL_DL, true, IPA_DPS_HPS_SEQ_TYPE_2ND_PKT_PROCESS_PASS_NO_DEC_UCP, QMB_MASTER_SELECT_DDR, { 7, 9, 8, 16, IPA_EE_AP } }, { 7, 9, 8, 16, IPA_EE_AP, GSI_USE_PREFETCH_BUFS } }, [IPA_4_0][IPA_CLIENT_TEST4_PROD] = { true, IPA_v4_0_GROUP_UL_DL, true, IPA_DPS_HPS_SEQ_TYPE_2ND_PKT_PROCESS_PASS_NO_DEC_UCP, QMB_MASTER_SELECT_DDR, {8, 10, 8, 16, IPA_EE_AP } }, {8, 10, 8, 16, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY } }, [IPA_4_0][IPA_CLIENT_WLAN1_CONS] = { Loading @@ -1213,73 +1213,73 @@ static const struct ipa_ep_configuration ipa3_ep_mapping false, IPA_DPS_HPS_SEQ_TYPE_INVALID, QMB_MASTER_SELECT_DDR, { 18, 3, 6, 9, IPA_EE_UC } }, { 18, 3, 6, 9, IPA_EE_UC, GSI_USE_PREFETCH_BUFS } }, [IPA_4_0][IPA_CLIENT_WLAN2_CONS] = { true, IPA_v4_0_GROUP_UL_DL, false, IPA_DPS_HPS_SEQ_TYPE_INVALID, QMB_MASTER_SELECT_DDR, { 20, 13, 9, 9, IPA_EE_AP } }, { 20, 13, 9, 9, IPA_EE_AP, GSI_USE_PREFETCH_BUFS } }, [IPA_4_0][IPA_CLIENT_WLAN3_CONS] = { true, IPA_v4_0_GROUP_UL_DL, false, IPA_DPS_HPS_SEQ_TYPE_INVALID, QMB_MASTER_SELECT_DDR, { 21, 14, 9, 9, IPA_EE_AP } }, { 21, 14, 9, 9, IPA_EE_AP, GSI_USE_PREFETCH_BUFS } }, [IPA_4_0][IPA_CLIENT_USB_CONS] = { true, IPA_v4_0_GROUP_UL_DL, false, IPA_DPS_HPS_SEQ_TYPE_INVALID, QMB_MASTER_SELECT_DDR, { 19, 12, 9, 9, IPA_EE_AP } }, { 19, 12, 9, 9, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY } }, [IPA_4_0][IPA_CLIENT_USB_DPL_CONS] = { true, IPA_v4_0_GROUP_UL_DL, false, IPA_DPS_HPS_SEQ_TYPE_INVALID, QMB_MASTER_SELECT_DDR, { 15, 7, 5, 5, IPA_EE_AP } }, { 15, 7, 5, 5, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY } }, [IPA_4_0][IPA_CLIENT_APPS_LAN_CONS] = { true, IPA_v4_0_GROUP_UL_DL, false, IPA_DPS_HPS_SEQ_TYPE_INVALID, QMB_MASTER_SELECT_DDR, { 10, 5, 9, 9, IPA_EE_AP } }, { 10, 5, 9, 9, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY } }, [IPA_4_0][IPA_CLIENT_APPS_WAN_CONS] = { true, IPA_v4_0_GROUP_UL_DL, false, IPA_DPS_HPS_SEQ_TYPE_INVALID, QMB_MASTER_SELECT_DDR, { 11, 6, 9, 9, IPA_EE_AP } }, { 11, 6, 9, 9, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY } }, [IPA_4_0][IPA_CLIENT_ODU_EMB_CONS] = { true, IPA_v4_0_GROUP_UL_DL, false, IPA_DPS_HPS_SEQ_TYPE_INVALID, QMB_MASTER_SELECT_DDR, { 17, 1, 17, 17, IPA_EE_AP } }, { 17, 1, 17, 17, IPA_EE_AP, GSI_USE_PREFETCH_BUFS } }, [IPA_4_0][IPA_CLIENT_ETHERNET_CONS] = { true, IPA_v4_0_GROUP_UL_DL, true, IPA_DPS_HPS_SEQ_TYPE_INVALID, QMB_MASTER_SELECT_DDR, { 22, 1, 17, 17, IPA_EE_UC } }, { 22, 1, 17, 17, IPA_EE_UC, GSI_USE_PREFETCH_BUFS } }, [IPA_4_0][IPA_CLIENT_Q6_LAN_CONS] = { true, IPA_v4_0_GROUP_UL_DL, false, IPA_DPS_HPS_SEQ_TYPE_INVALID, QMB_MASTER_SELECT_DDR, { 14, 4, 9, 9, IPA_EE_Q6 } }, { 14, 4, 9, 9, IPA_EE_Q6, GSI_USE_PREFETCH_BUFS } }, [IPA_4_0][IPA_CLIENT_Q6_WAN_CONS] = { true, IPA_v4_0_GROUP_UL_DL, false, IPA_DPS_HPS_SEQ_TYPE_INVALID, QMB_MASTER_SELECT_DDR, { 13, 3, 9, 9, IPA_EE_Q6 } }, { 13, 3, 9, 9, IPA_EE_Q6, GSI_USE_PREFETCH_BUFS } }, [IPA_4_0][IPA_CLIENT_Q6_LTE_WIFI_AGGR_CONS] = { true, IPA_v4_0_GROUP_UL_DL, false, IPA_DPS_HPS_SEQ_TYPE_INVALID, QMB_MASTER_SELECT_DDR, { 16, 5, 9, 9, IPA_EE_Q6 } }, { 16, 5, 9, 9, IPA_EE_Q6, GSI_USE_PREFETCH_BUFS } }, /* Only for test purpose */ /* MBIM aggregation test pipes should have the same QMB as USB_CONS */ [IPA_4_0][IPA_CLIENT_TEST_CONS] = { Loading @@ -1287,38 +1287,38 @@ static const struct ipa_ep_configuration ipa3_ep_mapping false, IPA_DPS_HPS_SEQ_TYPE_INVALID, QMB_MASTER_SELECT_DDR, { 11, 6, 9, 9, IPA_EE_AP } }, { 11, 6, 9, 9, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY } }, [IPA_4_0][IPA_CLIENT_TEST1_CONS] = { true, IPA_v4_0_GROUP_UL_DL, false, IPA_DPS_HPS_SEQ_TYPE_INVALID, QMB_MASTER_SELECT_DDR, { 11, 6, 9, 9, IPA_EE_AP } }, { 11, 6, 9, 9, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY } }, [IPA_4_0][IPA_CLIENT_TEST2_CONS] = { true, IPA_v4_0_GROUP_UL_DL, false, IPA_DPS_HPS_SEQ_TYPE_INVALID, QMB_MASTER_SELECT_DDR, { 12, 2, 5, 5, IPA_EE_AP } }, { 12, 2, 5, 5, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY } }, [IPA_4_0][IPA_CLIENT_TEST3_CONS] = { true, IPA_v4_0_GROUP_UL_DL, false, IPA_DPS_HPS_SEQ_TYPE_INVALID, QMB_MASTER_SELECT_DDR, { 19, 12, 9, 9, IPA_EE_AP } }, { 19, 12, 9, 9, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY } }, [IPA_4_0][IPA_CLIENT_TEST4_CONS] = { true, IPA_v4_0_GROUP_UL_DL, false, IPA_DPS_HPS_SEQ_TYPE_INVALID, QMB_MASTER_SELECT_DDR, { 21, 14, 9, 9, IPA_EE_AP } }, { 21, 14, 9, 9, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY } }, /* Dummy consumer (pipe 31) is used in L2TP rt rule */ [IPA_4_0][IPA_CLIENT_DUMMY_CONS] = { true, IPA_v4_0_GROUP_UL_DL, false, IPA_DPS_HPS_SEQ_TYPE_INVALID, QMB_MASTER_SELECT_DDR, { 31, 31, 8, 8, IPA_EE_AP } }, { 31, 31, 8, 8, IPA_EE_AP, GSI_USE_PREFETCH_BUFS } }, /* IPA_4_0_MHI */ [IPA_4_0_MHI][IPA_CLIENT_APPS_WAN_PROD] = { Loading @@ -1326,74 +1326,74 @@ static const struct ipa_ep_configuration ipa3_ep_mapping true, IPA_DPS_HPS_SEQ_TYPE_2ND_PKT_PROCESS_PASS_NO_DEC_UCP, QMB_MASTER_SELECT_DDR, { 2, 3, 16, 32, IPA_EE_AP } }, { 2, 3, 16, 32, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY } }, [IPA_4_0_MHI][IPA_CLIENT_APPS_CMD_PROD] = { true, IPA_v4_0_MHI_GROUP_DDR, false, IPA_DPS_HPS_SEQ_TYPE_DMA_ONLY, QMB_MASTER_SELECT_DDR, { 5, 4, 20, 24, IPA_EE_AP } }, { 5, 4, 20, 24, IPA_EE_AP, GSI_USE_PREFETCH_BUFS } }, [IPA_4_0_MHI][IPA_CLIENT_MHI_PROD] = { true, IPA_v4_0_MHI_GROUP_PCIE, true, IPA_DPS_HPS_SEQ_TYPE_2ND_PKT_PROCESS_PASS_NO_DEC_UCP, QMB_MASTER_SELECT_PCIE, { 1, 0, 8, 16, IPA_EE_AP } }, { 1, 0, 8, 16, IPA_EE_AP, GSI_USE_PREFETCH_BUFS } }, [IPA_4_0_MHI][IPA_CLIENT_Q6_WAN_PROD] = { true, IPA_v4_0_GROUP_UL_DL, true, IPA_DPS_HPS_SEQ_TYPE_PKT_PROCESS_NO_DEC_UCP, QMB_MASTER_SELECT_DDR, { 3, 0, 16, 32, IPA_EE_Q6 } }, { 3, 0, 16, 32, IPA_EE_Q6, GSI_USE_PREFETCH_BUFS } }, [IPA_4_0_MHI][IPA_CLIENT_Q6_CMD_PROD] = { true, IPA_v4_0_MHI_GROUP_PCIE, false, IPA_DPS_HPS_SEQ_TYPE_PKT_PROCESS_NO_DEC_UCP, QMB_MASTER_SELECT_DDR, { 4, 1, 20, 24, IPA_EE_Q6 } }, { 4, 1, 20, 24, IPA_EE_Q6, GSI_USE_PREFETCH_BUFS } }, [IPA_4_0_MHI][IPA_CLIENT_MEMCPY_DMA_SYNC_PROD] = { true, IPA_v4_0_MHI_GROUP_DMA, false, IPA_DPS_HPS_SEQ_TYPE_DMA_ONLY, QMB_MASTER_SELECT_DDR, { 7, 9, 8, 16, IPA_EE_AP } }, { 7, 9, 8, 16, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY } }, [IPA_4_0_MHI][IPA_CLIENT_MEMCPY_DMA_ASYNC_PROD] = { true, IPA_v4_0_MHI_GROUP_DMA, false, IPA_DPS_HPS_SEQ_TYPE_DMA_ONLY, QMB_MASTER_SELECT_DDR, { 8, 10, 8, 16, IPA_EE_AP } }, { 8, 10, 8, 16, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY } }, /* Only for test purpose */ [IPA_4_0_MHI][IPA_CLIENT_TEST_PROD] = { true, IPA_v4_0_GROUP_UL_DL, true, IPA_DPS_HPS_SEQ_TYPE_2ND_PKT_PROCESS_PASS_NO_DEC_UCP, QMB_MASTER_SELECT_DDR, {0, 8, 8, 16, IPA_EE_AP } }, {0, 8, 8, 16, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY } }, [IPA_4_0_MHI][IPA_CLIENT_TEST1_PROD] = { true, IPA_v4_0_GROUP_UL_DL, true, IPA_DPS_HPS_SEQ_TYPE_2ND_PKT_PROCESS_PASS_NO_DEC_UCP, QMB_MASTER_SELECT_DDR, {0, 8, 8, 16, IPA_EE_AP } }, {0, 8, 8, 16, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY } }, [IPA_4_0_MHI][IPA_CLIENT_TEST2_PROD] = { true, IPA_v4_0_GROUP_UL_DL, true, IPA_DPS_HPS_SEQ_TYPE_2ND_PKT_PROCESS_PASS_NO_DEC_UCP, QMB_MASTER_SELECT_DDR, { 1, 0, 8, 16, IPA_EE_AP } }, { 1, 0, 8, 16, IPA_EE_AP, GSI_USE_PREFETCH_BUFS } }, [IPA_4_0_MHI][IPA_CLIENT_TEST3_PROD] = { true, IPA_v4_0_GROUP_UL_DL, true, IPA_DPS_HPS_SEQ_TYPE_2ND_PKT_PROCESS_PASS_NO_DEC_UCP, QMB_MASTER_SELECT_DDR, {7, 9, 8, 16, IPA_EE_AP } }, {7, 9, 8, 16, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY } }, [IPA_4_0_MHI][IPA_CLIENT_TEST4_PROD] = { true, IPA_v4_0_GROUP_UL_DL, true, IPA_DPS_HPS_SEQ_TYPE_2ND_PKT_PROCESS_PASS_NO_DEC_UCP, QMB_MASTER_SELECT_DDR, { 8, 10, 8, 16, IPA_EE_AP } }, { 8, 10, 8, 16, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY } }, [IPA_4_0_MHI][IPA_CLIENT_APPS_LAN_CONS] = { Loading @@ -1401,87 +1401,87 @@ static const struct ipa_ep_configuration ipa3_ep_mapping false, IPA_DPS_HPS_SEQ_TYPE_INVALID, QMB_MASTER_SELECT_DDR, { 10, 5, 9, 9, IPA_EE_AP } }, { 10, 5, 9, 9, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY } }, [IPA_4_0_MHI][IPA_CLIENT_APPS_WAN_CONS] = { true, IPA_v4_0_MHI_GROUP_DDR, false, IPA_DPS_HPS_SEQ_TYPE_INVALID, QMB_MASTER_SELECT_DDR, { 11, 6, 9, 9, IPA_EE_AP } }, { 11, 6, 9, 9, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY } }, [IPA_4_0_MHI][IPA_CLIENT_MHI_CONS] = { true, IPA_v4_0_MHI_GROUP_PCIE, false, IPA_DPS_HPS_SEQ_TYPE_INVALID, QMB_MASTER_SELECT_PCIE, { 17, 1, 17, 17, IPA_EE_AP } }, { 17, 1, 17, 17, IPA_EE_AP, GSI_USE_PREFETCH_BUFS } }, [IPA_4_0_MHI][IPA_CLIENT_Q6_LAN_CONS] = { true, IPA_v4_0_MHI_GROUP_DDR, false, IPA_DPS_HPS_SEQ_TYPE_INVALID, QMB_MASTER_SELECT_DDR, { 14, 4, 9, 9, IPA_EE_Q6 } }, { 14, 4, 9, 9, IPA_EE_Q6, GSI_USE_PREFETCH_BUFS } }, [IPA_4_0_MHI][IPA_CLIENT_Q6_WAN_CONS] = { true, IPA_v4_0_MHI_GROUP_DDR, false, IPA_DPS_HPS_SEQ_TYPE_INVALID, QMB_MASTER_SELECT_DDR, { 13, 3, 9, 9, IPA_EE_Q6 } }, { 13, 3, 9, 9, IPA_EE_Q6, GSI_USE_PREFETCH_BUFS } }, [IPA_4_0_MHI][IPA_CLIENT_MEMCPY_DMA_SYNC_CONS] = { true, IPA_v4_0_MHI_GROUP_DMA, false, IPA_DPS_HPS_SEQ_TYPE_INVALID, QMB_MASTER_SELECT_PCIE, { 20, 13, 9, 9, IPA_EE_AP } }, { 20, 13, 9, 9, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY } }, [IPA_4_0_MHI][IPA_CLIENT_MEMCPY_DMA_ASYNC_CONS] = { true, IPA_v4_0_MHI_GROUP_DMA, false, IPA_DPS_HPS_SEQ_TYPE_INVALID, QMB_MASTER_SELECT_PCIE, { 21, 14, 9, 9, IPA_EE_AP } }, { 21, 14, 9, 9, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY } }, [IPA_4_0_MHI][IPA_CLIENT_Q6_LTE_WIFI_AGGR_CONS] = { true, IPA_v4_0_GROUP_UL_DL, false, IPA_DPS_HPS_SEQ_TYPE_INVALID, QMB_MASTER_SELECT_DDR, { 16, 5, 9, 9, IPA_EE_Q6 } }, { 16, 5, 9, 9, IPA_EE_Q6, GSI_USE_PREFETCH_BUFS } }, /* Only for test purpose */ [IPA_4_0_MHI][IPA_CLIENT_TEST_CONS] = { true, IPA_v4_0_GROUP_UL_DL, false, IPA_DPS_HPS_SEQ_TYPE_INVALID, QMB_MASTER_SELECT_PCIE, { 11, 6, 9, 9, IPA_EE_AP } }, { 11, 6, 9, 9, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY } }, [IPA_4_0_MHI][IPA_CLIENT_TEST1_CONS] = { true, IPA_v4_0_GROUP_UL_DL, false, IPA_DPS_HPS_SEQ_TYPE_INVALID, QMB_MASTER_SELECT_PCIE, { 11, 6, 9, 9, IPA_EE_AP } }, { 11, 6, 9, 9, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY } }, [IPA_4_0_MHI][IPA_CLIENT_TEST2_CONS] = { true, IPA_v4_0_GROUP_UL_DL, false, IPA_DPS_HPS_SEQ_TYPE_INVALID, QMB_MASTER_SELECT_DDR, { 12, 2, 5, 5, IPA_EE_AP } }, { 12, 2, 5, 5, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY } }, [IPA_4_0_MHI][IPA_CLIENT_TEST3_CONS] = { true, IPA_v4_0_GROUP_UL_DL, false, IPA_DPS_HPS_SEQ_TYPE_INVALID, QMB_MASTER_SELECT_PCIE, { 19, 12, 9, 9, IPA_EE_AP } }, { 19, 12, 9, 9, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY } }, [IPA_4_0_MHI][IPA_CLIENT_TEST4_CONS] = { true, IPA_v4_0_GROUP_UL_DL, false, IPA_DPS_HPS_SEQ_TYPE_INVALID, QMB_MASTER_SELECT_PCIE, { 21, 14, 9, 9, IPA_EE_AP } }, { 21, 14, 9, 9, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY } }, /* Dummy consumer (pipe 31) is used in L2TP rt rule */ [IPA_4_0_MHI][IPA_CLIENT_DUMMY_CONS] = { true, IPA_v4_0_GROUP_UL_DL, false, IPA_DPS_HPS_SEQ_TYPE_INVALID, QMB_MASTER_SELECT_DDR, { 31, 31, 8, 8, IPA_EE_AP } }, { 31, 31, 8, 8, IPA_EE_AP, GSI_USE_PREFETCH_BUFS } }, }; /** Loading Loading @@ -2133,6 +2133,28 @@ int ipa3_get_ep_mapping(enum ipa_client_type client) return ipa_ep_idx; } /** * ipa_get_ep_prefetch_mode() - provide prefetch_mode endpoint * @client: client type * * Return value: prefetch_mode */ enum gsi_prefetch_mode ipa_get_ep_prefetch_mode(enum ipa_client_type client) { enum gsi_prefetch_mode prefetch_mode; if (client >= IPA_CLIENT_MAX || client < 0) { IPAERR_RL("Bad client number: client =%d\n", client); return -IPA_EP_NOT_ALLOCATED; } prefetch_mode = ipa3_ep_mapping[ipa3_get_hw_type_index()][client]. ipa_gsi_ep_info.prefetch_mode; return prefetch_mode; } /** * ipa3_get_gsi_ep_info() - provide gsi ep information * @client: IPA client value Loading Loading
drivers/platform/msm/ipa/ipa_clients/ipa_usb.c +6 −1 Original line number Diff line number Diff line Loading @@ -1336,7 +1336,12 @@ static int ipa3_usb_request_xdci_channel( chan_params.chan_params.ring_base_addr = params->xfer_ring_base_addr_iova; chan_params.chan_params.ring_base_vaddr = NULL; if (ipa3_ctx->ipa_hw_type >= IPA_HW_v4_0) chan_params.chan_params.use_db_eng = GSI_CHAN_DIRECT_MODE; else chan_params.chan_params.use_db_eng = GSI_CHAN_DB_MODE; chan_params.chan_params.prefetch_mode = ipa_get_ep_prefetch_mode(chan_params.client); chan_params.chan_params.max_prefetch = GSI_ONE_PREFETCH_SEG; if (params->dir == GSI_CHAN_DIR_FROM_GSI) chan_params.chan_params.low_weight = Loading
drivers/platform/msm/ipa/ipa_v3/ipa_dp.c +12 −2 Original line number Diff line number Diff line Loading @@ -3701,8 +3701,13 @@ static int ipa_gsi_setup_channel(struct ipa_sys_connect_params *in, ep->gsi_mem_info.chan_ring_base_vaddr = gsi_channel_props.ring_base_vaddr; if (ipa3_ctx->ipa_hw_type >= IPA_HW_v4_0) gsi_channel_props.use_db_eng = GSI_CHAN_DIRECT_MODE; else gsi_channel_props.use_db_eng = GSI_CHAN_DB_MODE; gsi_channel_props.max_prefetch = GSI_ONE_PREFETCH_SEG; gsi_channel_props.prefetch_mode = ipa_get_ep_prefetch_mode(ep->client); if (ep->client == IPA_CLIENT_APPS_CMD_PROD) gsi_channel_props.low_weight = IPA_GSI_MAX_CH_LOW_WEIGHT; else Loading Loading @@ -3941,7 +3946,12 @@ int ipa_gsi_ch20_wa(void) dma_alloc_coherent(ipa3_ctx->pdev, gsi_channel_props.ring_len, &dma_addr, 0); gsi_channel_props.ring_base_addr = dma_addr; if (ipa3_ctx->ipa_hw_type >= IPA_HW_v4_0) gsi_channel_props.use_db_eng = GSI_CHAN_DIRECT_MODE; else gsi_channel_props.use_db_eng = GSI_CHAN_DB_MODE; gsi_channel_props.max_prefetch = GSI_ONE_PREFETCH_SEG; gsi_channel_props.low_weight = 1; gsi_channel_props.err_cb = ipa_gsi_chan_err_cb; Loading
drivers/platform/msm/ipa/ipa_v3/ipa_i.h +2 −0 Original line number Diff line number Diff line Loading @@ -2258,6 +2258,8 @@ int ipa3_remove_interrupt_handler(enum ipa_irq_type interrupt); */ int ipa3_get_ep_mapping(enum ipa_client_type client); enum gsi_prefetch_mode ipa_get_ep_prefetch_mode(enum ipa_client_type client); bool ipa3_is_ready(void); void ipa3_proxy_clk_vote(void); Loading
drivers/platform/msm/ipa/ipa_v3/ipa_mhi.c +18 −4 Original line number Diff line number Diff line Loading @@ -198,6 +198,7 @@ static int ipa_mhi_start_gsi_channel(enum ipa_client_type client, union __packed gsi_channel_scratch ch_scratch; struct ipa3_ep_context *ep; const struct ipa_gsi_ep_config *ep_cfg; bool burst_mode_enabled = false; IPA_MHI_FUNC_ENTRY(); Loading Loading @@ -280,8 +281,21 @@ static int ipa_mhi_start_gsi_channel(enum ipa_client_type client, ch_props.ring_len = params->ch_ctx_host->rlen; ch_props.ring_base_addr = IPA_MHI_HOST_ADDR_COND( params->ch_ctx_host->rbase); if (params->ch_ctx_host->brstmode == IPA_MHI_BURST_MODE_DEFAULT || params->ch_ctx_host->brstmode == IPA_MHI_BURST_MODE_ENABLE) { burst_mode_enabled = true; } if (ipa3_ctx->ipa_hw_type >= IPA_HW_v4_0 && !burst_mode_enabled) ch_props.use_db_eng = GSI_CHAN_DIRECT_MODE; else ch_props.use_db_eng = GSI_CHAN_DB_MODE; ch_props.max_prefetch = GSI_ONE_PREFETCH_SEG; ch_props.prefetch_mode = ipa_get_ep_prefetch_mode(client); ch_props.low_weight = 1; ch_props.err_cb = params->ch_err_cb; ch_props.chan_user_data = params->channel; Loading @@ -307,9 +321,9 @@ static int ipa_mhi_start_gsi_channel(enum ipa_client_type client, ch_scratch.mhi.outstanding_threshold = 0; } ch_scratch.mhi.oob_mod_threshold = 4; if (params->ch_ctx_host->brstmode == IPA_MHI_BURST_MODE_DEFAULT || params->ch_ctx_host->brstmode == IPA_MHI_BURST_MODE_ENABLE) { ch_scratch.mhi.burst_mode_enabled = true; if (burst_mode_enabled) { ch_scratch.mhi.burst_mode_enabled = burst_mode_enabled; ch_scratch.mhi.polling_configuration = ipa3_mhi_get_ch_poll_cfg(client, params->ch_ctx_host, (ch_props.ring_len / ch_props.re_size)); Loading
drivers/platform/msm/ipa/ipa_v3/ipa_utils.c +80 −58 Original line number Diff line number Diff line Loading @@ -1126,86 +1126,86 @@ static const struct ipa_ep_configuration ipa3_ep_mapping true, IPA_DPS_HPS_REP_SEQ_TYPE_2PKT_PROC_PASS_NO_DEC_UCP_DMAP, QMB_MASTER_SELECT_DDR, { 6, 2, 8, 16, IPA_EE_UC } }, { 6, 2, 8, 16, IPA_EE_UC, GSI_USE_PREFETCH_BUFS } }, [IPA_4_0][IPA_CLIENT_USB_PROD] = { true, IPA_v4_0_GROUP_UL_DL, true, IPA_DPS_HPS_REP_SEQ_TYPE_2PKT_PROC_PASS_NO_DEC_UCP_DMAP, QMB_MASTER_SELECT_DDR, { 0, 8, 8, 16, IPA_EE_AP } }, { 0, 8, 8, 16, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY } }, [IPA_4_0][IPA_CLIENT_APPS_LAN_PROD] = { true, IPA_v4_0_GROUP_UL_DL, false, IPA_DPS_HPS_SEQ_TYPE_2ND_PKT_PROCESS_PASS_NO_DEC_UCP, QMB_MASTER_SELECT_DDR, { 8, 10, 8, 16, IPA_EE_AP } }, { 8, 10, 8, 16, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY } }, [IPA_4_0][IPA_CLIENT_APPS_WAN_PROD] = { true, IPA_v4_0_GROUP_UL_DL, true, IPA_DPS_HPS_REP_SEQ_TYPE_2PKT_PROC_PASS_NO_DEC_UCP_DMAP, QMB_MASTER_SELECT_DDR, { 2, 3, 16, 32, IPA_EE_AP } }, { 2, 3, 16, 32, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY } }, [IPA_4_0][IPA_CLIENT_APPS_CMD_PROD] = { true, IPA_v4_0_GROUP_UL_DL, false, IPA_DPS_HPS_SEQ_TYPE_DMA_ONLY, QMB_MASTER_SELECT_DDR, { 5, 4, 20, 24, IPA_EE_AP } }, { 5, 4, 20, 24, IPA_EE_AP, GSI_USE_PREFETCH_BUFS } }, [IPA_4_0][IPA_CLIENT_ODU_PROD] = { true, IPA_v4_0_GROUP_UL_DL, true, IPA_DPS_HPS_REP_SEQ_TYPE_2PKT_PROC_PASS_NO_DEC_UCP_DMAP, QMB_MASTER_SELECT_DDR, { 1, 0, 8, 16, IPA_EE_AP } }, { 1, 0, 8, 16, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY } }, [IPA_4_0][IPA_CLIENT_ETHERNET_PROD] = { true, IPA_v4_0_GROUP_UL_DL, true, IPA_DPS_HPS_REP_SEQ_TYPE_2PKT_PROC_PASS_NO_DEC_UCP_DMAP, QMB_MASTER_SELECT_DDR, { 9, 0, 8, 16, IPA_EE_UC } }, { 9, 0, 8, 16, IPA_EE_UC, GSI_USE_PREFETCH_BUFS } }, [IPA_4_0][IPA_CLIENT_Q6_WAN_PROD] = { true, IPA_v4_0_GROUP_UL_DL, true, IPA_DPS_HPS_SEQ_TYPE_2ND_PKT_PROCESS_PASS_NO_DEC_UCP, QMB_MASTER_SELECT_DDR, { 3, 0, 16, 32, IPA_EE_Q6 } }, { 3, 0, 16, 32, IPA_EE_Q6, GSI_USE_PREFETCH_BUFS } }, [IPA_4_0][IPA_CLIENT_Q6_CMD_PROD] = { true, IPA_v4_0_GROUP_UL_DL, false, IPA_DPS_HPS_SEQ_TYPE_PKT_PROCESS_NO_DEC_UCP, QMB_MASTER_SELECT_DDR, { 4, 1, 20, 24, IPA_EE_Q6 } }, { 4, 1, 20, 24, IPA_EE_Q6, GSI_USE_PREFETCH_BUFS } }, /* Only for test purpose */ [IPA_4_0][IPA_CLIENT_TEST_PROD] = { true, IPA_v4_0_GROUP_UL_DL, true, IPA_DPS_HPS_SEQ_TYPE_2ND_PKT_PROCESS_PASS_NO_DEC_UCP, QMB_MASTER_SELECT_DDR, {0, 8, 8, 16, IPA_EE_AP } }, {0, 8, 8, 16, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY } }, [IPA_4_0][IPA_CLIENT_TEST1_PROD] = { true, IPA_v4_0_GROUP_UL_DL, true, IPA_DPS_HPS_SEQ_TYPE_2ND_PKT_PROCESS_PASS_NO_DEC_UCP, QMB_MASTER_SELECT_DDR, {0, 8, 8, 16, IPA_EE_AP } }, {0, 8, 8, 16, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY } }, [IPA_4_0][IPA_CLIENT_TEST2_PROD] = { true, IPA_v4_0_GROUP_UL_DL, true, IPA_DPS_HPS_SEQ_TYPE_2ND_PKT_PROCESS_PASS_NO_DEC_UCP, QMB_MASTER_SELECT_DDR, { 1, 0, 8, 16, IPA_EE_AP } }, { 1, 0, 8, 16, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY } }, [IPA_4_0][IPA_CLIENT_TEST3_PROD] = { true, IPA_v4_0_GROUP_UL_DL, true, IPA_DPS_HPS_SEQ_TYPE_2ND_PKT_PROCESS_PASS_NO_DEC_UCP, QMB_MASTER_SELECT_DDR, { 7, 9, 8, 16, IPA_EE_AP } }, { 7, 9, 8, 16, IPA_EE_AP, GSI_USE_PREFETCH_BUFS } }, [IPA_4_0][IPA_CLIENT_TEST4_PROD] = { true, IPA_v4_0_GROUP_UL_DL, true, IPA_DPS_HPS_SEQ_TYPE_2ND_PKT_PROCESS_PASS_NO_DEC_UCP, QMB_MASTER_SELECT_DDR, {8, 10, 8, 16, IPA_EE_AP } }, {8, 10, 8, 16, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY } }, [IPA_4_0][IPA_CLIENT_WLAN1_CONS] = { Loading @@ -1213,73 +1213,73 @@ static const struct ipa_ep_configuration ipa3_ep_mapping false, IPA_DPS_HPS_SEQ_TYPE_INVALID, QMB_MASTER_SELECT_DDR, { 18, 3, 6, 9, IPA_EE_UC } }, { 18, 3, 6, 9, IPA_EE_UC, GSI_USE_PREFETCH_BUFS } }, [IPA_4_0][IPA_CLIENT_WLAN2_CONS] = { true, IPA_v4_0_GROUP_UL_DL, false, IPA_DPS_HPS_SEQ_TYPE_INVALID, QMB_MASTER_SELECT_DDR, { 20, 13, 9, 9, IPA_EE_AP } }, { 20, 13, 9, 9, IPA_EE_AP, GSI_USE_PREFETCH_BUFS } }, [IPA_4_0][IPA_CLIENT_WLAN3_CONS] = { true, IPA_v4_0_GROUP_UL_DL, false, IPA_DPS_HPS_SEQ_TYPE_INVALID, QMB_MASTER_SELECT_DDR, { 21, 14, 9, 9, IPA_EE_AP } }, { 21, 14, 9, 9, IPA_EE_AP, GSI_USE_PREFETCH_BUFS } }, [IPA_4_0][IPA_CLIENT_USB_CONS] = { true, IPA_v4_0_GROUP_UL_DL, false, IPA_DPS_HPS_SEQ_TYPE_INVALID, QMB_MASTER_SELECT_DDR, { 19, 12, 9, 9, IPA_EE_AP } }, { 19, 12, 9, 9, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY } }, [IPA_4_0][IPA_CLIENT_USB_DPL_CONS] = { true, IPA_v4_0_GROUP_UL_DL, false, IPA_DPS_HPS_SEQ_TYPE_INVALID, QMB_MASTER_SELECT_DDR, { 15, 7, 5, 5, IPA_EE_AP } }, { 15, 7, 5, 5, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY } }, [IPA_4_0][IPA_CLIENT_APPS_LAN_CONS] = { true, IPA_v4_0_GROUP_UL_DL, false, IPA_DPS_HPS_SEQ_TYPE_INVALID, QMB_MASTER_SELECT_DDR, { 10, 5, 9, 9, IPA_EE_AP } }, { 10, 5, 9, 9, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY } }, [IPA_4_0][IPA_CLIENT_APPS_WAN_CONS] = { true, IPA_v4_0_GROUP_UL_DL, false, IPA_DPS_HPS_SEQ_TYPE_INVALID, QMB_MASTER_SELECT_DDR, { 11, 6, 9, 9, IPA_EE_AP } }, { 11, 6, 9, 9, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY } }, [IPA_4_0][IPA_CLIENT_ODU_EMB_CONS] = { true, IPA_v4_0_GROUP_UL_DL, false, IPA_DPS_HPS_SEQ_TYPE_INVALID, QMB_MASTER_SELECT_DDR, { 17, 1, 17, 17, IPA_EE_AP } }, { 17, 1, 17, 17, IPA_EE_AP, GSI_USE_PREFETCH_BUFS } }, [IPA_4_0][IPA_CLIENT_ETHERNET_CONS] = { true, IPA_v4_0_GROUP_UL_DL, true, IPA_DPS_HPS_SEQ_TYPE_INVALID, QMB_MASTER_SELECT_DDR, { 22, 1, 17, 17, IPA_EE_UC } }, { 22, 1, 17, 17, IPA_EE_UC, GSI_USE_PREFETCH_BUFS } }, [IPA_4_0][IPA_CLIENT_Q6_LAN_CONS] = { true, IPA_v4_0_GROUP_UL_DL, false, IPA_DPS_HPS_SEQ_TYPE_INVALID, QMB_MASTER_SELECT_DDR, { 14, 4, 9, 9, IPA_EE_Q6 } }, { 14, 4, 9, 9, IPA_EE_Q6, GSI_USE_PREFETCH_BUFS } }, [IPA_4_0][IPA_CLIENT_Q6_WAN_CONS] = { true, IPA_v4_0_GROUP_UL_DL, false, IPA_DPS_HPS_SEQ_TYPE_INVALID, QMB_MASTER_SELECT_DDR, { 13, 3, 9, 9, IPA_EE_Q6 } }, { 13, 3, 9, 9, IPA_EE_Q6, GSI_USE_PREFETCH_BUFS } }, [IPA_4_0][IPA_CLIENT_Q6_LTE_WIFI_AGGR_CONS] = { true, IPA_v4_0_GROUP_UL_DL, false, IPA_DPS_HPS_SEQ_TYPE_INVALID, QMB_MASTER_SELECT_DDR, { 16, 5, 9, 9, IPA_EE_Q6 } }, { 16, 5, 9, 9, IPA_EE_Q6, GSI_USE_PREFETCH_BUFS } }, /* Only for test purpose */ /* MBIM aggregation test pipes should have the same QMB as USB_CONS */ [IPA_4_0][IPA_CLIENT_TEST_CONS] = { Loading @@ -1287,38 +1287,38 @@ static const struct ipa_ep_configuration ipa3_ep_mapping false, IPA_DPS_HPS_SEQ_TYPE_INVALID, QMB_MASTER_SELECT_DDR, { 11, 6, 9, 9, IPA_EE_AP } }, { 11, 6, 9, 9, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY } }, [IPA_4_0][IPA_CLIENT_TEST1_CONS] = { true, IPA_v4_0_GROUP_UL_DL, false, IPA_DPS_HPS_SEQ_TYPE_INVALID, QMB_MASTER_SELECT_DDR, { 11, 6, 9, 9, IPA_EE_AP } }, { 11, 6, 9, 9, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY } }, [IPA_4_0][IPA_CLIENT_TEST2_CONS] = { true, IPA_v4_0_GROUP_UL_DL, false, IPA_DPS_HPS_SEQ_TYPE_INVALID, QMB_MASTER_SELECT_DDR, { 12, 2, 5, 5, IPA_EE_AP } }, { 12, 2, 5, 5, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY } }, [IPA_4_0][IPA_CLIENT_TEST3_CONS] = { true, IPA_v4_0_GROUP_UL_DL, false, IPA_DPS_HPS_SEQ_TYPE_INVALID, QMB_MASTER_SELECT_DDR, { 19, 12, 9, 9, IPA_EE_AP } }, { 19, 12, 9, 9, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY } }, [IPA_4_0][IPA_CLIENT_TEST4_CONS] = { true, IPA_v4_0_GROUP_UL_DL, false, IPA_DPS_HPS_SEQ_TYPE_INVALID, QMB_MASTER_SELECT_DDR, { 21, 14, 9, 9, IPA_EE_AP } }, { 21, 14, 9, 9, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY } }, /* Dummy consumer (pipe 31) is used in L2TP rt rule */ [IPA_4_0][IPA_CLIENT_DUMMY_CONS] = { true, IPA_v4_0_GROUP_UL_DL, false, IPA_DPS_HPS_SEQ_TYPE_INVALID, QMB_MASTER_SELECT_DDR, { 31, 31, 8, 8, IPA_EE_AP } }, { 31, 31, 8, 8, IPA_EE_AP, GSI_USE_PREFETCH_BUFS } }, /* IPA_4_0_MHI */ [IPA_4_0_MHI][IPA_CLIENT_APPS_WAN_PROD] = { Loading @@ -1326,74 +1326,74 @@ static const struct ipa_ep_configuration ipa3_ep_mapping true, IPA_DPS_HPS_SEQ_TYPE_2ND_PKT_PROCESS_PASS_NO_DEC_UCP, QMB_MASTER_SELECT_DDR, { 2, 3, 16, 32, IPA_EE_AP } }, { 2, 3, 16, 32, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY } }, [IPA_4_0_MHI][IPA_CLIENT_APPS_CMD_PROD] = { true, IPA_v4_0_MHI_GROUP_DDR, false, IPA_DPS_HPS_SEQ_TYPE_DMA_ONLY, QMB_MASTER_SELECT_DDR, { 5, 4, 20, 24, IPA_EE_AP } }, { 5, 4, 20, 24, IPA_EE_AP, GSI_USE_PREFETCH_BUFS } }, [IPA_4_0_MHI][IPA_CLIENT_MHI_PROD] = { true, IPA_v4_0_MHI_GROUP_PCIE, true, IPA_DPS_HPS_SEQ_TYPE_2ND_PKT_PROCESS_PASS_NO_DEC_UCP, QMB_MASTER_SELECT_PCIE, { 1, 0, 8, 16, IPA_EE_AP } }, { 1, 0, 8, 16, IPA_EE_AP, GSI_USE_PREFETCH_BUFS } }, [IPA_4_0_MHI][IPA_CLIENT_Q6_WAN_PROD] = { true, IPA_v4_0_GROUP_UL_DL, true, IPA_DPS_HPS_SEQ_TYPE_PKT_PROCESS_NO_DEC_UCP, QMB_MASTER_SELECT_DDR, { 3, 0, 16, 32, IPA_EE_Q6 } }, { 3, 0, 16, 32, IPA_EE_Q6, GSI_USE_PREFETCH_BUFS } }, [IPA_4_0_MHI][IPA_CLIENT_Q6_CMD_PROD] = { true, IPA_v4_0_MHI_GROUP_PCIE, false, IPA_DPS_HPS_SEQ_TYPE_PKT_PROCESS_NO_DEC_UCP, QMB_MASTER_SELECT_DDR, { 4, 1, 20, 24, IPA_EE_Q6 } }, { 4, 1, 20, 24, IPA_EE_Q6, GSI_USE_PREFETCH_BUFS } }, [IPA_4_0_MHI][IPA_CLIENT_MEMCPY_DMA_SYNC_PROD] = { true, IPA_v4_0_MHI_GROUP_DMA, false, IPA_DPS_HPS_SEQ_TYPE_DMA_ONLY, QMB_MASTER_SELECT_DDR, { 7, 9, 8, 16, IPA_EE_AP } }, { 7, 9, 8, 16, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY } }, [IPA_4_0_MHI][IPA_CLIENT_MEMCPY_DMA_ASYNC_PROD] = { true, IPA_v4_0_MHI_GROUP_DMA, false, IPA_DPS_HPS_SEQ_TYPE_DMA_ONLY, QMB_MASTER_SELECT_DDR, { 8, 10, 8, 16, IPA_EE_AP } }, { 8, 10, 8, 16, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY } }, /* Only for test purpose */ [IPA_4_0_MHI][IPA_CLIENT_TEST_PROD] = { true, IPA_v4_0_GROUP_UL_DL, true, IPA_DPS_HPS_SEQ_TYPE_2ND_PKT_PROCESS_PASS_NO_DEC_UCP, QMB_MASTER_SELECT_DDR, {0, 8, 8, 16, IPA_EE_AP } }, {0, 8, 8, 16, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY } }, [IPA_4_0_MHI][IPA_CLIENT_TEST1_PROD] = { true, IPA_v4_0_GROUP_UL_DL, true, IPA_DPS_HPS_SEQ_TYPE_2ND_PKT_PROCESS_PASS_NO_DEC_UCP, QMB_MASTER_SELECT_DDR, {0, 8, 8, 16, IPA_EE_AP } }, {0, 8, 8, 16, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY } }, [IPA_4_0_MHI][IPA_CLIENT_TEST2_PROD] = { true, IPA_v4_0_GROUP_UL_DL, true, IPA_DPS_HPS_SEQ_TYPE_2ND_PKT_PROCESS_PASS_NO_DEC_UCP, QMB_MASTER_SELECT_DDR, { 1, 0, 8, 16, IPA_EE_AP } }, { 1, 0, 8, 16, IPA_EE_AP, GSI_USE_PREFETCH_BUFS } }, [IPA_4_0_MHI][IPA_CLIENT_TEST3_PROD] = { true, IPA_v4_0_GROUP_UL_DL, true, IPA_DPS_HPS_SEQ_TYPE_2ND_PKT_PROCESS_PASS_NO_DEC_UCP, QMB_MASTER_SELECT_DDR, {7, 9, 8, 16, IPA_EE_AP } }, {7, 9, 8, 16, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY } }, [IPA_4_0_MHI][IPA_CLIENT_TEST4_PROD] = { true, IPA_v4_0_GROUP_UL_DL, true, IPA_DPS_HPS_SEQ_TYPE_2ND_PKT_PROCESS_PASS_NO_DEC_UCP, QMB_MASTER_SELECT_DDR, { 8, 10, 8, 16, IPA_EE_AP } }, { 8, 10, 8, 16, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY } }, [IPA_4_0_MHI][IPA_CLIENT_APPS_LAN_CONS] = { Loading @@ -1401,87 +1401,87 @@ static const struct ipa_ep_configuration ipa3_ep_mapping false, IPA_DPS_HPS_SEQ_TYPE_INVALID, QMB_MASTER_SELECT_DDR, { 10, 5, 9, 9, IPA_EE_AP } }, { 10, 5, 9, 9, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY } }, [IPA_4_0_MHI][IPA_CLIENT_APPS_WAN_CONS] = { true, IPA_v4_0_MHI_GROUP_DDR, false, IPA_DPS_HPS_SEQ_TYPE_INVALID, QMB_MASTER_SELECT_DDR, { 11, 6, 9, 9, IPA_EE_AP } }, { 11, 6, 9, 9, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY } }, [IPA_4_0_MHI][IPA_CLIENT_MHI_CONS] = { true, IPA_v4_0_MHI_GROUP_PCIE, false, IPA_DPS_HPS_SEQ_TYPE_INVALID, QMB_MASTER_SELECT_PCIE, { 17, 1, 17, 17, IPA_EE_AP } }, { 17, 1, 17, 17, IPA_EE_AP, GSI_USE_PREFETCH_BUFS } }, [IPA_4_0_MHI][IPA_CLIENT_Q6_LAN_CONS] = { true, IPA_v4_0_MHI_GROUP_DDR, false, IPA_DPS_HPS_SEQ_TYPE_INVALID, QMB_MASTER_SELECT_DDR, { 14, 4, 9, 9, IPA_EE_Q6 } }, { 14, 4, 9, 9, IPA_EE_Q6, GSI_USE_PREFETCH_BUFS } }, [IPA_4_0_MHI][IPA_CLIENT_Q6_WAN_CONS] = { true, IPA_v4_0_MHI_GROUP_DDR, false, IPA_DPS_HPS_SEQ_TYPE_INVALID, QMB_MASTER_SELECT_DDR, { 13, 3, 9, 9, IPA_EE_Q6 } }, { 13, 3, 9, 9, IPA_EE_Q6, GSI_USE_PREFETCH_BUFS } }, [IPA_4_0_MHI][IPA_CLIENT_MEMCPY_DMA_SYNC_CONS] = { true, IPA_v4_0_MHI_GROUP_DMA, false, IPA_DPS_HPS_SEQ_TYPE_INVALID, QMB_MASTER_SELECT_PCIE, { 20, 13, 9, 9, IPA_EE_AP } }, { 20, 13, 9, 9, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY } }, [IPA_4_0_MHI][IPA_CLIENT_MEMCPY_DMA_ASYNC_CONS] = { true, IPA_v4_0_MHI_GROUP_DMA, false, IPA_DPS_HPS_SEQ_TYPE_INVALID, QMB_MASTER_SELECT_PCIE, { 21, 14, 9, 9, IPA_EE_AP } }, { 21, 14, 9, 9, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY } }, [IPA_4_0_MHI][IPA_CLIENT_Q6_LTE_WIFI_AGGR_CONS] = { true, IPA_v4_0_GROUP_UL_DL, false, IPA_DPS_HPS_SEQ_TYPE_INVALID, QMB_MASTER_SELECT_DDR, { 16, 5, 9, 9, IPA_EE_Q6 } }, { 16, 5, 9, 9, IPA_EE_Q6, GSI_USE_PREFETCH_BUFS } }, /* Only for test purpose */ [IPA_4_0_MHI][IPA_CLIENT_TEST_CONS] = { true, IPA_v4_0_GROUP_UL_DL, false, IPA_DPS_HPS_SEQ_TYPE_INVALID, QMB_MASTER_SELECT_PCIE, { 11, 6, 9, 9, IPA_EE_AP } }, { 11, 6, 9, 9, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY } }, [IPA_4_0_MHI][IPA_CLIENT_TEST1_CONS] = { true, IPA_v4_0_GROUP_UL_DL, false, IPA_DPS_HPS_SEQ_TYPE_INVALID, QMB_MASTER_SELECT_PCIE, { 11, 6, 9, 9, IPA_EE_AP } }, { 11, 6, 9, 9, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY } }, [IPA_4_0_MHI][IPA_CLIENT_TEST2_CONS] = { true, IPA_v4_0_GROUP_UL_DL, false, IPA_DPS_HPS_SEQ_TYPE_INVALID, QMB_MASTER_SELECT_DDR, { 12, 2, 5, 5, IPA_EE_AP } }, { 12, 2, 5, 5, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY } }, [IPA_4_0_MHI][IPA_CLIENT_TEST3_CONS] = { true, IPA_v4_0_GROUP_UL_DL, false, IPA_DPS_HPS_SEQ_TYPE_INVALID, QMB_MASTER_SELECT_PCIE, { 19, 12, 9, 9, IPA_EE_AP } }, { 19, 12, 9, 9, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY } }, [IPA_4_0_MHI][IPA_CLIENT_TEST4_CONS] = { true, IPA_v4_0_GROUP_UL_DL, false, IPA_DPS_HPS_SEQ_TYPE_INVALID, QMB_MASTER_SELECT_PCIE, { 21, 14, 9, 9, IPA_EE_AP } }, { 21, 14, 9, 9, IPA_EE_AP, GSI_ESCAPE_BUF_ONLY } }, /* Dummy consumer (pipe 31) is used in L2TP rt rule */ [IPA_4_0_MHI][IPA_CLIENT_DUMMY_CONS] = { true, IPA_v4_0_GROUP_UL_DL, false, IPA_DPS_HPS_SEQ_TYPE_INVALID, QMB_MASTER_SELECT_DDR, { 31, 31, 8, 8, IPA_EE_AP } }, { 31, 31, 8, 8, IPA_EE_AP, GSI_USE_PREFETCH_BUFS } }, }; /** Loading Loading @@ -2133,6 +2133,28 @@ int ipa3_get_ep_mapping(enum ipa_client_type client) return ipa_ep_idx; } /** * ipa_get_ep_prefetch_mode() - provide prefetch_mode endpoint * @client: client type * * Return value: prefetch_mode */ enum gsi_prefetch_mode ipa_get_ep_prefetch_mode(enum ipa_client_type client) { enum gsi_prefetch_mode prefetch_mode; if (client >= IPA_CLIENT_MAX || client < 0) { IPAERR_RL("Bad client number: client =%d\n", client); return -IPA_EP_NOT_ALLOCATED; } prefetch_mode = ipa3_ep_mapping[ipa3_get_hw_type_index()][client]. ipa_gsi_ep_info.prefetch_mode; return prefetch_mode; } /** * ipa3_get_gsi_ep_info() - provide gsi ep information * @client: IPA client value Loading