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Commit b99cfa66 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'v3.17-rockchip-rk3288' of... 

Merge tag 'v3.17-rockchip-rk3288' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt

Merge "Initial support for Rockchip RK3288 SoCs" from Heiko Stuebner:

* tag 'v3.17-rockchip-rk3288' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip

:
  ARM: dts: Build dtbs for Rockchip boards
  ARM: dts: add rk3288 evaluation board
  ARM: dts: rockchip: add core rk3288 dtsi
  ARM: rockchip: enable support for RK3288 SoCs
  ARM: Kconfig: set default gpio number for rockchip SoCs
  ARM: rockchip: add debug uart used by rk3288
  ARM: rockchip: clarify usability of DEBUG_RK3X_UART debug_ll options
  dt-bindings: arm: add cortex-a12 and cortex-a17 cpu compatible properties

Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 3fdef7e3 b1db66b8

Documentation/devicetree/bindings/arm/cpus.txt

+2 −0
Original line number Diff line number Diff line
@@ -152,7 +152,9 @@ nodes to be present and contain the properties described below. 
			    "arm,cortex-a7"

			    "arm,cortex-a8"

			    "arm,cortex-a9"

			    "arm,cortex-a12"

			    "arm,cortex-a15"

			    "arm,cortex-a17"

			    "arm,cortex-a53"

			    "arm,cortex-a57"

			    "arm,cortex-m0"

arch/arm/Kconfig

+1 −0
Original line number Diff line number Diff line
@@ -1558,6 +1558,7 @@ config ARCH_NR_GPIO 
	default 416 if ARCH_SUNXI

	default 392 if ARCH_U8500

	default 352 if ARCH_VT8500

	default 288 if ARCH_ROCKCHIP

	default 264 if MACH_H4700

	default 0

	help

arch/arm/Kconfig.debug

+15 −5
Original line number Diff line number Diff line
@@ -582,7 +582,7 @@ choice 
		  on Rockchip based platforms.



	config DEBUG_RK3X_UART0

		bool "Kernel low-level debugging messages via Rockchip RK3X UART0"

		bool "Kernel low-level debugging messages via Rockchip RK30/RK31 UART0"

		depends on ARCH_ROCKCHIP

		select DEBUG_UART_8250

		help
@@ -590,7 +590,7 @@ choice 
		  on Rockchip based platforms.



	config DEBUG_RK3X_UART1

		bool "Kernel low-level debugging messages via Rockchip RK3X UART1"

		bool "Kernel low-level debugging messages via Rockchip RK30/RK31 UART1"

		depends on ARCH_ROCKCHIP

		select DEBUG_UART_8250

		help
@@ -598,7 +598,7 @@ choice 
		  on Rockchip based platforms.



	config DEBUG_RK3X_UART2

		bool "Kernel low-level debugging messages via Rockchip RK3X UART2"

		bool "Kernel low-level debugging messages via Rockchip RK30/RK31 UART2"

		depends on ARCH_ROCKCHIP

		select DEBUG_UART_8250

		help
@@ -606,13 +606,21 @@ choice 
		  on Rockchip based platforms.



	config DEBUG_RK3X_UART3

		bool "Kernel low-level debugging messages via Rockchip RK3X UART3"

		bool "Kernel low-level debugging messages via Rockchip RK30/RK31 UART3"

		depends on ARCH_ROCKCHIP

		select DEBUG_UART_8250

		help

		  Say Y here if you want kernel low-level debugging support

		  on Rockchip based platforms.



	config DEBUG_RK32_UART2

		bool "Kernel low-level debugging messages via Rockchip RK32 UART2"

		depends on ARCH_ROCKCHIP

		select DEBUG_UART_8250

		help

		  Say Y here if you want kernel low-level debugging support

		  on Rockchip RK32xx based platforms.



	config DEBUG_S3C_UART0

		depends on PLAT_SAMSUNG

		select DEBUG_EXYNOS_UART if ARCH_EXYNOS
@@ -1096,6 +1104,7 @@ config DEBUG_UART_PHYS 
	default 0xf991e000 if DEBUG_QCOM_UARTDM

	default 0xfcb00000 if DEBUG_HI3620_UART

	default 0xfe800000 if ARCH_IOP32X

	default 0xff690000 if DEBUG_RK32_UART2

	default 0xffc02000 if DEBUG_SOCFPGA_UART

	default 0xffd82340 if ARCH_IOP13XX

	default 0xfff36000 if DEBUG_HIGHBANK_UART
@@ -1152,6 +1161,7 @@ config DEBUG_UART_VIRT 
	default 0xfec02000 if DEBUG_SOCFPGA_UART

	default 0xfec12000 if DEBUG_MVEBU_UART || DEBUG_MVEBU_UART_ALTERNATE

	default 0xfec20000 if DEBUG_DAVINCI_DMx_UART0

	default 0xfec90000 if DEBUG_RK32_UART2

	default 0xfed0c000 if DEBUG_DAVINCI_DA8XX_UART1

	default 0xfed0d000 if DEBUG_DAVINCI_DA8XX_UART2

	default 0xfed12000 if ARCH_KIRKWOOD
@@ -1186,7 +1196,7 @@ config DEBUG_UART_8250_WORD 
		ARCH_KEYSTONE || \

		DEBUG_DAVINCI_DMx_UART0 || DEBUG_DAVINCI_DA8XX_UART1 || \

		DEBUG_DAVINCI_DA8XX_UART2 || \

		DEBUG_BCM_KONA_UART

		DEBUG_BCM_KONA_UART || DEBUG_RK32_UART2



config DEBUG_UART_8250_FLOW_CONTROL

	bool "Enable flow control for 8250 UART"

arch/arm/boot/dts/Makefile

+5 −0
Original line number Diff line number Diff line
@@ -344,6 +344,11 @@ dtb-$(CONFIG_ARCH_QCOM) += \ 
	qcom-apq8084-mtp.dtb \

	qcom-msm8660-surf.dtb \

	qcom-msm8960-cdp.dtb

dtb-$(CONFIG_ARCH_ROCKCHIP) += \

	rk3066a-bqcurie2.dtb \

	rk3188-radxarock.dtb \

	rk3288-evb-act8846.dtb \

	rk3288-evb-rk808.dtb

dtb-$(CONFIG_ARCH_S3C24XX) += s3c2416-smdk2416.dtb

dtb-$(CONFIG_ARCH_S3C64XX) += s3c6410-mini6410.dtb \

	s3c6410-smdk6410.dtb

arch/arm/boot/dts/rk3288-evb-act8846.dts

0 → 100644
+134 −0
Original line number Diff line number Diff line 
/*

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License as published by

 * the Free Software Foundation; either version 2 of the License, or

 * (at your option) any later version.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 */



/dts-v1/;

#include "rk3288-evb.dtsi"



/ {

	compatible = "rockchip,rk3288-evb-act8846", "rockchip,rk3288";

};



&i2c0 {

	hym8563@51 {

		compatible = "haoyu,hym8563";

		reg = <0x51>;



		interrupt-parent = <&gpio0>;

		interrupts = <4 IRQ_TYPE_EDGE_FALLING>;



		pinctrl-names = "default";

		pinctrl-0 = <&hym8563_int>;



		#clock-cells = <0>;

		clock-output-names = "xin32k";

	};



	act8846: act8846@5a {

		compatible = "active-semi,act8846";

		reg = <0x5a>;

		status = "okay";



		regulators {

			vcc_ddr: REG1 {

				regulator-name = "VCC_DDR";

				regulator-min-microvolt = <1200000>;

				regulator-max-microvolt = <1200000>;

				regulator-always-on;

			};



			vcc_io: REG2 {

				regulator-name = "VCC_IO";

				regulator-min-microvolt = <3300000>;

				regulator-max-microvolt = <3300000>;

				regulator-always-on;

			};



			vdd_log: REG3 {

				regulator-name = "VDD_LOG";

				regulator-min-microvolt = <1000000>;

				regulator-max-microvolt = <1000000>;

				regulator-always-on;

			};



			vcc_20: REG4 {

				regulator-name = "VCC_20";

				regulator-min-microvolt = <2000000>;

				regulator-max-microvolt = <2000000>;

				regulator-always-on;

			};



			vccio_sd: REG5 {

				regulator-name = "VCCIO_SD";

				regulator-min-microvolt = <3300000>;

				regulator-max-microvolt = <3300000>;

				regulator-always-on;

			};



			vdd10_lcd: REG6 {

				regulator-name = "VDD10_LCD";

				regulator-min-microvolt = <1000000>;

				regulator-max-microvolt = <1000000>;

				regulator-always-on;

			};



			vcca_codec: REG7 {

				regulator-name = "VCCA_CODEC";

				regulator-min-microvolt = <3300000>;

				regulator-max-microvolt = <3300000>;

				regulator-always-on;

			};



			vcca_tp: REG8 {

				regulator-name = "VCCA_TP";

				regulator-min-microvolt = <3300000>;

				regulator-max-microvolt = <3300000>;

				regulator-always-on;

			};



			vccio_pmu: REG9 {

				regulator-name = "VCCIO_PMU";

				regulator-min-microvolt = <3300000>;

				regulator-max-microvolt = <3300000>;

				regulator-always-on;

			};



			vdd_10: REG10 {

				regulator-name = "VDD_10";

				regulator-min-microvolt = <1000000>;

				regulator-max-microvolt = <1000000>;

				regulator-always-on;

			};



			vcc_18: REG11 {

				regulator-name = "VCC_18";

				regulator-min-microvolt = <1800000>;

				regulator-max-microvolt = <1800000>;

				regulator-always-on;

			};



			vcc18_lcd: REG12 {

				regulator-name = "VCC18_LCD";

				regulator-min-microvolt = <1800000>;

				regulator-max-microvolt = <1800000>;

				regulator-always-on;

			};

		};

	};

};



&pinctrl {

	hym8563 {

		hym8563_int: hym8563-int {

			rockchip,pins = <RK_GPIO0 4 RK_FUNC_GPIO &pcfg_pull_up>;

		};

	};

};