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Commit b90dfb04 authored by Liu, Jinsong's avatar Liu, Jinsong Committed by Avi Kivity
Browse files

x86: TSC deadline definitions 



This pre-defination is preparing for KVM tsc deadline timer emulation, but
theirself are not kvm specific.

Signed-off-by: default avatarLiu, Jinsong <jinsong.liu@intel.com>
Signed-off-by: default avatarMarcelo Tosatti <mtosatti@redhat.com>
parent 7460fb4a

arch/x86/include/asm/apicdef.h

+2 −0
Original line number Original line Diff line number Diff line
@@ -100,7 +100,9 @@ 
#define		APIC_TIMER_BASE_CLKIN		0x0

#define		APIC_TIMER_BASE_CLKIN		0x0

#define		APIC_TIMER_BASE_TMBASE		0x1

#define		APIC_TIMER_BASE_TMBASE		0x1

#define		APIC_TIMER_BASE_DIV		0x2

#define		APIC_TIMER_BASE_DIV		0x2

#define		APIC_LVT_TIMER_ONESHOT		(0 << 17)

#define		APIC_LVT_TIMER_PERIODIC		(1 << 17)

#define		APIC_LVT_TIMER_PERIODIC		(1 << 17)

#define		APIC_LVT_TIMER_TSCDEADLINE	(2 << 17)

#define		APIC_LVT_MASKED			(1 << 16)

#define		APIC_LVT_MASKED			(1 << 16)

#define		APIC_LVT_LEVEL_TRIGGER		(1 << 15)

#define		APIC_LVT_LEVEL_TRIGGER		(1 << 15)

#define		APIC_LVT_REMOTE_IRR		(1 << 14)

#define		APIC_LVT_REMOTE_IRR		(1 << 14)

arch/x86/include/asm/cpufeature.h

+1 −0
Original line number Original line Diff line number Diff line
@@ -120,6 +120,7 @@ 
#define X86_FEATURE_X2APIC	(4*32+21) /* x2APIC */

#define X86_FEATURE_X2APIC	(4*32+21) /* x2APIC */

#define X86_FEATURE_MOVBE	(4*32+22) /* MOVBE instruction */

#define X86_FEATURE_MOVBE	(4*32+22) /* MOVBE instruction */

#define X86_FEATURE_POPCNT      (4*32+23) /* POPCNT instruction */

#define X86_FEATURE_POPCNT      (4*32+23) /* POPCNT instruction */

#define X86_FEATURE_TSC_DEADLINE_TIMER	(4*32+24) /* Tsc deadline timer */

#define X86_FEATURE_AES		(4*32+25) /* AES instructions */

#define X86_FEATURE_AES		(4*32+25) /* AES instructions */

#define X86_FEATURE_XSAVE	(4*32+26) /* XSAVE/XRSTOR/XSETBV/XGETBV */

#define X86_FEATURE_XSAVE	(4*32+26) /* XSAVE/XRSTOR/XSETBV/XGETBV */

#define X86_FEATURE_OSXSAVE	(4*32+27) /* "" XSAVE enabled in the OS */

#define X86_FEATURE_OSXSAVE	(4*32+27) /* "" XSAVE enabled in the OS */

arch/x86/include/asm/msr-index.h

+2 −0
Original line number Original line Diff line number Diff line
@@ -229,6 +229,8 @@ 
#define MSR_IA32_APICBASE_ENABLE	(1<<11)

#define MSR_IA32_APICBASE_ENABLE	(1<<11)

#define MSR_IA32_APICBASE_BASE		(0xfffff<<12)

#define MSR_IA32_APICBASE_BASE		(0xfffff<<12)





#define MSR_IA32_TSCDEADLINE		0x000006e0



#define MSR_IA32_UCODE_WRITE		0x00000079

#define MSR_IA32_UCODE_WRITE		0x00000079

#define MSR_IA32_UCODE_REV		0x0000008b

#define MSR_IA32_UCODE_REV		0x0000008b