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Commit b9024cbc authored by Naveen Krishna Ch's avatar Naveen Krishna Ch Committed by Kukjin Kim
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arm64: dts: Add initial device tree support for exynos7 



Add initial device tree nodes for exynos7 SoC and board dts file
to support espresso board based on exynos7 SoC.

Signed-off-by: default avatarNaveen Krishna Ch <naveenkrishna.ch@gmail.com>
Signed-off-by: default avatarAbhilash Kesavan <a.kesavan@samsung.com>
Reviewed-by: default avatarThomas Abraham <thomas.ab@samsung.com>
Tested-by: default avatarThomas Abraham <thomas.ab@samsung.com>
Cc: Rob Herring <robh@kernel.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: default avatarKukjin Kim <kgene@kernel.org>
parent 97bf6af1

arch/arm64/boot/dts/Makefile

+1 −0
Original line number Original line Diff line number Diff line
@@ -2,6 +2,7 @@ dts-dirs += amd 
dts-dirs += apm

dts-dirs += apm

dts-dirs += arm

dts-dirs += arm

dts-dirs += cavium

dts-dirs += cavium

dts-dirs += exynos





always		:= $(dtb-y)

always		:= $(dtb-y)

subdir-y	:= $(dts-dirs)

subdir-y	:= $(dts-dirs)

arch/arm64/boot/dts/exynos/Makefile

0 → 100644
+5 −0
Original line number Original line Diff line number Diff line 
dtb-$(CONFIG_ARCH_EXYNOS7) += exynos7-espresso.dtb



always		:= $(dtb-y)

subdir-y	:= $(dts-dirs)

clean-files	:= *.dtb

arch/arm64/boot/dts/exynos/exynos7-espresso.dts

0 → 100644
+39 −0
Original line number Original line Diff line number Diff line 
/*

 * SAMSUNG Exynos7 Espresso board device tree source

 *

 * Copyright (c) 2014 Samsung Electronics Co., Ltd.

 *		http://www.samsung.com

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 as

 * published by the Free Software Foundation.

*/



/dts-v1/;

#include "exynos7.dtsi"



/ {

	model = "Samsung Exynos7 Espresso board based on EXYNOS7";

	compatible = "samsung,exynos7-espresso", "samsung,exynos7";



	aliases {

		serial0 = &serial_2;

	};



	chosen {

		linux,stdout-path = &serial_2;

	};



	memory@40000000 {

		device_type = "memory";

		reg = <0x0 0x40000000 0x0 0xC0000000>;

	};

};



&fin_pll {

	clock-frequency = <24000000>;

};



&serial_2 {

	status = "okay";

};

arch/arm64/boot/dts/exynos/exynos7.dtsi

0 → 100644
+183 −0
Original line number Original line Diff line number Diff line 
/*

 * SAMSUNG EXYNOS7 SoC device tree source

 *

 * Copyright (c) 2014 Samsung Electronics Co., Ltd.

 *		http://www.samsung.com

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 as

 * published by the Free Software Foundation.

 */



#include <dt-bindings/clock/exynos7-clk.h>



/ {

	compatible = "samsung,exynos7";

	interrupt-parent = <&gic>;

	#address-cells = <2>;

	#size-cells = <2>;



	cpus {

		#address-cells = <1>;

		#size-cells = <0>;



		cpu@0 {

			device_type = "cpu";

			compatible = "arm,cortex-a57", "arm,armv8";

			reg = <0x0>;

			enable-method = "psci";

		};



		cpu@1 {

			device_type = "cpu";

			compatible = "arm,cortex-a57", "arm,armv8";

			reg = <0x1>;

			enable-method = "psci";

		};



		cpu@2 {

			device_type = "cpu";

			compatible = "arm,cortex-a57", "arm,armv8";

			reg = <0x2>;

			enable-method = "psci";

		};



		cpu@3 {

			device_type = "cpu";

			compatible = "arm,cortex-a57", "arm,armv8";

			reg = <0x3>;

			enable-method = "psci";

		};

	};



	psci {

		compatible = "arm,psci-0.2";

		method = "smc";

	};



	soc: soc {

		compatible = "simple-bus";

		#address-cells = <1>;

		#size-cells = <1>;

		ranges = <0 0 0 0x18000000>;



		chipid@10000000 {

			compatible = "samsung,exynos4210-chipid";

			reg = <0x10000000 0x100>;

		};



		fin_pll: xxti {

			compatible = "fixed-clock";

			clock-output-names = "fin_pll";

			#clock-cells = <0>;

		};



		gic: interrupt-controller@11001000 {

			compatible = "arm,gic-400";

			#interrupt-cells = <3>;

			#address-cells = <0>;

			interrupt-controller;

			reg =	<0x11001000 0x1000>,

				<0x11002000 0x1000>,

				<0x11004000 0x2000>,

				<0x11006000 0x2000>;

		};



		clock_topc: clock-controller@10570000 {

			compatible = "samsung,exynos7-clock-topc";

			reg = <0x10570000 0x10000>;

			#clock-cells = <1>;

		};



		clock_top0: clock-controller@105d0000 {

			compatible = "samsung,exynos7-clock-top0";

			reg = <0x105d0000 0xb000>;

			#clock-cells = <1>;

			clocks = <&fin_pll>, <&clock_topc DOUT_SCLK_BUS0_PLL>,

				 <&clock_topc DOUT_SCLK_BUS1_PLL>,

				 <&clock_topc DOUT_SCLK_CC_PLL>,

				 <&clock_topc DOUT_SCLK_MFC_PLL>;

			clock-names = "fin_pll", "dout_sclk_bus0_pll",

				      "dout_sclk_bus1_pll", "dout_sclk_cc_pll",

				      "dout_sclk_mfc_pll";

		};



		clock_peric0: clock-controller@13610000 {

			compatible = "samsung,exynos7-clock-peric0";

			reg = <0x13610000 0xd00>;

			#clock-cells = <1>;

			clocks = <&fin_pll>, <&clock_top0 DOUT_ACLK_PERIC0>,

				 <&clock_top0 CLK_SCLK_UART0>;

			clock-names = "fin_pll", "dout_aclk_peric0_66",

				      "sclk_uart0";

		};



		clock_peric1: clock-controller@14c80000 {

			compatible = "samsung,exynos7-clock-peric1";

			reg = <0x14c80000 0xd00>;

			#clock-cells = <1>;

			clocks = <&fin_pll>, <&clock_top0 DOUT_ACLK_PERIC1>,

				 <&clock_top0 CLK_SCLK_UART1>,

				 <&clock_top0 CLK_SCLK_UART2>,

				 <&clock_top0 CLK_SCLK_UART3>;

			clock-names = "fin_pll", "dout_aclk_peric1_66",

				      "sclk_uart1", "sclk_uart2", "sclk_uart3";

		};



		clock_peris: clock-controller@10040000 {

			compatible = "samsung,exynos7-clock-peris";

			reg = <0x10040000 0xd00>;

			#clock-cells = <1>;

			clocks = <&fin_pll>, <&clock_topc DOUT_ACLK_PERIS>;

			clock-names = "fin_pll", "dout_aclk_peris_66";

		};



		serial_0: serial@13630000 {

			compatible = "samsung,exynos4210-uart";

			reg = <0x13630000 0x100>;

			interrupts = <0 440 0>;

			clocks = <&clock_peric0 PCLK_UART0>,

				 <&clock_peric0 SCLK_UART0>;

			clock-names = "uart", "clk_uart_baud0";

			status = "disabled";

		};



		serial_1: serial@14c20000 {

			compatible = "samsung,exynos4210-uart";

			reg = <0x14c20000 0x100>;

			interrupts = <0 456 0>;

			clocks = <&clock_peric1 PCLK_UART1>,

				 <&clock_peric1 SCLK_UART1>;

			clock-names = "uart", "clk_uart_baud0";

			status = "disabled";

		};



		serial_2: serial@14c30000 {

			compatible = "samsung,exynos4210-uart";

			reg = <0x14c30000 0x100>;

			interrupts = <0 457 0>;

			clocks = <&clock_peric1 PCLK_UART2>,

				 <&clock_peric1 SCLK_UART2>;

			clock-names = "uart", "clk_uart_baud0";

			status = "disabled";

		};



		serial_3: serial@14c40000 {

			compatible = "samsung,exynos4210-uart";

			reg = <0x14c40000 0x100>;

			interrupts = <0 458 0>;

			clocks = <&clock_peric1 PCLK_UART3>,

				 <&clock_peric1 SCLK_UART3>;

			clock-names = "uart", "clk_uart_baud0";

			status = "disabled";

		};



		timer {

			compatible = "arm,armv8-timer";

			interrupts = <1 13 0xff01>,

				     <1 14 0xff01>,

				     <1 11 0xff01>,

				     <1 10 0xff01>;

		};

	};

};