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Commit b8c75920 authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
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Merge "ARM: dts: msm: Add NFC device node for SDM439"

parents dec69cc9 8ea68ce8

arch/arm64/boot/dts/qcom/msm8937-pinctrl.dtsi

+54 −26
Original line number Diff line number Diff line
@@ -141,41 +141,69 @@ 
			};

		};



		pmx_rd_nfc_int {

			/*qcom,pins = <&gp 17>;*/

		nfc {

			nfc_int_active: nfc_int_active {

				/* active state */

				mux {

					/* GPIO 17 NFC Read Interrupt */

					pins = "gpio17";

			qcom,pin-func = <0>;

			qcom,num-grp-pins = <1>;

			label = "pmx_nfc_int";

					function = "gpio";

				};



			nfc_int_active: active {

				drive-strength = <6>;

				config {

					pins = "gpio17";

					drive-strength = <2>; /* 2 MA */

					bias-pull-up;

				};

			};



			nfc_int_suspend: suspend {

				drive-strength = <6>;

			nfc_int_suspend: nfc_int_suspend {

				/* sleep state */

				mux {

					/* GPIO 17 NFC Read Interrupt */

					pins = "gpio17";

					function = "gpio";

				};



				config {

					pins = "gpio17";

					drive-strength = <2>; /* 2 MA */

					bias-pull-up;

				};

			};



		pmx_nfc_reset {

			/*qcom,pins = <&gp 16>;*/

			pins = "gpio16";

			qcom,pin-func = <0>;

			qcom,num-grp-pins = <1>;

			label = "pmx_nfc_disable";

			nfc_disable_active: nfc_disable_active {

				/* active state */

				mux {

					/* 16: NFC ENABLE 130: FW DNLD */

					/* 93: ESE Enable */

					pins = "gpio16", "gpio130", "gpio93";

					function = "gpio";

				};



			nfc_disable_active: active {

				drive-strength = <6>;

				config {

					pins = "gpio16", "gpio130", "gpio93";

					drive-strength = <2>; /* 2 MA */

					bias-pull-up;

				};

			};



			nfc_disable_suspend: suspend {

				drive-strength = <6>;

			nfc_disable_suspend: nfc_disable_suspend {

				/* sleep state */

				mux {

					/* 16: NFC ENABLE 130: FW DNLD */

					/* 93: ESE Enable */

					pins = "gpio16", "gpio130", "gpio93";

					function = "gpio";

				};



				config {

					pins = "gpio16", "gpio130", "gpio93";

					drive-strength = <2>; /* 2 MA */

					bias-disable;

				};

			};

		};



		tlmm_pmi_flash_led {

			rear_flash_led_enable: rear_flash_led_enable {

arch/arm64/boot/dts/qcom/sdm439-cdp.dtsi

+34 −0
Original line number Diff line number Diff line
@@ -17,6 +17,40 @@ 
	status = "ok";

};



&pm8953_gpios {

	nfc_clk {

		nfc_clk_default: nfc_clk_default {

			pins = "gpio2";

			function = "normal";

			input-enable;

			power-source = <1>;

		};

	};

};



&i2c_5 { /* BLSP2 QUP1 (NFC) */

	status = "ok";

	nq@28 {

		compatible = "qcom,nq-nci";

		reg = <0x28>;

		qcom,nq-irq = <&tlmm 17 0x00>;

		qcom,nq-ven = <&tlmm 16 0x00>;

		qcom,nq-firm = <&tlmm 130 0x00>;

		qcom,nq-clkreq = <&pm8953_gpios 2 0x00>;

		qcom,nq-esepwr = <&tlmm 93 0x00>;

		interrupt-parent = <&tlmm>;

		qcom,clk-src = "BBCLK2";

		interrupts = <17 0>;

		interrupt-names = "nfc_irq";

		pinctrl-names = "nfc_active", "nfc_suspend";

		pinctrl-0 = <&nfc_int_active &nfc_disable_active

						&nfc_clk_default>;

		pinctrl-1 = <&nfc_int_suspend &nfc_disable_suspend>;

		clocks = <&clock_gcc clk_bb_clk2_pin>;

		clock-names = "ref_clk";

	};

};



&sdhc_1 {

	/* device core power supply */

	vdd-supply = <&pm8953_l8>;

arch/arm64/boot/dts/qcom/sdm439-mtp.dtsi

+34 −0
Original line number Diff line number Diff line
@@ -17,6 +17,40 @@ 
	status = "ok";

};



&pm8953_gpios {

	nfc_clk {

		nfc_clk_default: nfc_clk_default {

			pins = "gpio2";

			function = "normal";

			input-enable;

			power-source = <1>;

		};

	};

};



&i2c_5 { /* BLSP2 QUP1 (NFC) */

	status = "ok";

	nq@28 {

		compatible = "qcom,nq-nci";

		reg = <0x28>;

		qcom,nq-irq = <&tlmm 17 0x00>;

		qcom,nq-ven = <&tlmm 16 0x00>;

		qcom,nq-firm = <&tlmm 130 0x00>;

		qcom,nq-clkreq = <&pm8953_gpios 2 0x00>;

		qcom,nq-esepwr = <&tlmm 93 0x00>;

		interrupt-parent = <&tlmm>;

		qcom,clk-src = "BBCLK2";

		interrupts = <17 0>;

		interrupt-names = "nfc_irq";

		pinctrl-names = "nfc_active", "nfc_suspend";

		pinctrl-0 = <&nfc_int_active &nfc_disable_active

						&nfc_clk_default>;

		pinctrl-1 = <&nfc_int_suspend &nfc_disable_suspend>;

		clocks = <&clock_gcc clk_bb_clk2_pin>;

		clock-names = "ref_clk";

	};

};



&sdhc_1 {

	/* device core power supply */

	vdd-supply = <&pm8953_l8>;

arch/arm64/boot/dts/qcom/sdm439-qrd.dtsi

+34 −0
Original line number Diff line number Diff line
@@ -61,6 +61,40 @@ 
	status = "okay";

};



&pm8953_gpios {

	nfc_clk {

		nfc_clk_default: nfc_clk_default {

			pins = "gpio2";

			function = "normal";

			input-enable;

			power-source = <1>;

		};

	};

};



&i2c_5 { /* BLSP2 QUP1 (NFC) */

	status = "ok";

	nq@28 {

		compatible = "qcom,nq-nci";

		reg = <0x28>;

		qcom,nq-irq = <&tlmm 17 0x00>;

		qcom,nq-ven = <&tlmm 16 0x00>;

		qcom,nq-firm = <&tlmm 130 0x00>;

		qcom,nq-clkreq = <&pm8953_gpios 2 0x00>;

		qcom,nq-esepwr = <&tlmm 93 0x00>;

		interrupt-parent = <&tlmm>;

		qcom,clk-src = "BBCLK2";

		interrupts = <17 0>;

		interrupt-names = "nfc_irq";

		pinctrl-names = "nfc_active", "nfc_suspend";

		pinctrl-0 = <&nfc_int_active &nfc_disable_active

						&nfc_clk_default>;

		pinctrl-1 = <&nfc_int_suspend &nfc_disable_suspend>;

		clocks = <&clock_gcc clk_bb_clk2_pin>;

		clock-names = "ref_clk";

	};

};



&sdhc_2 {

	/* device core power supply */

	vdd-supply = <&pm8953_l11>;