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Commit b8bd0240 authored by Tarun Karra's avatar Tarun Karra Committed by Gerrit - the friendly Code Review server
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msm: kgsl: Use GPU for HLSQ/SP/TP perfcounter select on A6xx 



On A6xx HLSQ/SP/TP registers cannot be updated from AHB when
GPU is busy. So use GPU inline submissions to update
HLSQ/SP/TP perfcounter select.

Change-Id: I4a48b16986886d2840e3ad999d45855bc4bc8973
Signed-off-by: default avatarTarun Karra <tkarra@codeaurora.org>
parent 1382e511

drivers/gpu/msm/adreno_perfcounter.c

+21 −2
Original line number Diff line number Diff line
@@ -768,6 +768,21 @@ static void _power_counter_enable_default(struct adreno_device *adreno_dev, 
	reg->value = 0;

}



static inline bool _perfcounter_inline_update(

	struct adreno_device *adreno_dev, unsigned int group)

{

	if (adreno_is_a6xx(adreno_dev)) {

		if ((group == KGSL_PERFCOUNTER_GROUP_HLSQ) ||

			(group == KGSL_PERFCOUNTER_GROUP_SP) ||

			(group == KGSL_PERFCOUNTER_GROUP_TP))

			return true;

		else

			return false;

	}



	return true;

}



static int _perfcounter_enable_default(struct adreno_device *adreno_dev,

		struct adreno_perfcounters *counters, unsigned int group,

		unsigned int counter, unsigned int countable)
@@ -793,13 +808,17 @@ static int _perfcounter_enable_default(struct adreno_device *adreno_dev, 
	grp = &(counters->groups[group]);

	reg = &(grp->regs[counter]);



	if (!adreno_is_a6xx(adreno_dev) &&

	if (_perfcounter_inline_update(adreno_dev, group) &&

		test_bit(ADRENO_DEVICE_STARTED, &adreno_dev->priv)) {

		struct adreno_ringbuffer *rb = &adreno_dev->ringbuffers[0];

		unsigned int buf[4];

		unsigned int *cmds = buf;

		int ret;



		if (gpudev->perfcounter_update && (grp->flags &

				ADRENO_PERFCOUNTER_GROUP_RESTORE))

			gpudev->perfcounter_update(adreno_dev, reg, false);



		cmds += cp_wait_for_idle(adreno_dev, cmds);

		*cmds++ = cp_register(adreno_dev, reg->select, 1);

		*cmds++ = countable;