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Commit b7e257f0 authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
Browse files

Merge "Merge android-4.9-o.80 (a9fd3188) into msm-4.9"

parents cbc4b49a 7b47fbdf

Documentation/x86/pti.txt

+1 −1
Original line number Diff line number Diff line
@@ -78,7 +78,7 @@ this protection comes at a cost: 
     non-PTI SYSCALL entry code, so requires mapping fewer

     things into the userspace page tables.  The downside is

     that stacks must be switched at entry time.

  d. Global pages are disabled for all kernel structures not

  c. Global pages are disabled for all kernel structures not

     mapped into both kernel and userspace page tables.  This

     feature of the MMU allows different processes to share TLB

     entries mapping the kernel.  Losing the feature means more

Makefile

+1 −1
Original line number Diff line number Diff line 
VERSION = 4

PATCHLEVEL = 9

SUBLEVEL = 77

SUBLEVEL = 80

EXTRAVERSION =

NAME = Roaring Lionus

arch/arm/boot/dts/bcm-nsp.dtsi

+2 −2
Original line number Diff line number Diff line
@@ -85,7 +85,7 @@ 
		timer@20200 {

			compatible = "arm,cortex-a9-global-timer";

			reg = <0x20200 0x100>;

			interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>;

			interrupts = <GIC_PPI 11 IRQ_TYPE_EDGE_RISING>;

			clocks = <&periph_clk>;

		};
@@ -93,7 +93,7 @@ 
			compatible = "arm,cortex-a9-twd-timer";

			reg = <0x20600 0x20>;

			interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) |

						  IRQ_TYPE_LEVEL_HIGH)>;

						  IRQ_TYPE_EDGE_RISING)>;

			clocks = <&periph_clk>;

		};

arch/arm/boot/dts/kirkwood-openblocks_a7.dts

+8 −2
Original line number Diff line number Diff line
@@ -53,7 +53,8 @@ 
		};



		pinctrl: pin-controller@10000 {

			pinctrl-0 = <&pmx_dip_switches &pmx_gpio_header>;

			pinctrl-0 = <&pmx_dip_switches &pmx_gpio_header

				     &pmx_gpio_header_gpo>;

			pinctrl-names = "default";



			pmx_uart0: pmx-uart0 {
@@ -85,11 +86,16 @@ 
			 * ground.

			 */

			pmx_gpio_header: pmx-gpio-header {

				marvell,pins = "mpp17", "mpp7", "mpp29", "mpp28",

				marvell,pins = "mpp17", "mpp29", "mpp28",

					       "mpp35", "mpp34", "mpp40";

				marvell,function = "gpio";

			};



			pmx_gpio_header_gpo: pxm-gpio-header-gpo {

				marvell,pins = "mpp7";

				marvell,function = "gpo";

			};



			pmx_gpio_init: pmx-init {

				marvell,pins = "mpp38";

				marvell,function = "gpio";

arch/arm/configs/sunxi_defconfig

+2 −0
Original line number Diff line number Diff line
@@ -11,6 +11,7 @@ CONFIG_SMP=y 
CONFIG_NR_CPUS=8

CONFIG_AEABI=y

CONFIG_HIGHMEM=y

CONFIG_CMA=y

CONFIG_ARM_APPENDED_DTB=y

CONFIG_ARM_ATAG_DTB_COMPAT=y

CONFIG_CPU_FREQ=y
@@ -35,6 +36,7 @@ CONFIG_CAN_SUN4I=y 
# CONFIG_WIRELESS is not set

CONFIG_DEVTMPFS=y

CONFIG_DEVTMPFS_MOUNT=y

CONFIG_DMA_CMA=y

CONFIG_BLK_DEV_SD=y

CONFIG_ATA=y

CONFIG_AHCI_SUNXI=y