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Commit b7d3e0a9 authored by Christoph Hellwig's avatar Christoph Hellwig Committed by Doug Ledford
Browse files

IB: remove support for phys MRs 



We have stopped using phys MRs in the kernel a while ago, so let's
remove all the cruft used to implement them.

Signed-off-by: default avatarChristoph Hellwig <hch@lst.de>
Reviewed-by: default avatarSagi Grimberg <sagig@mellanox.com>
Reviewed-by: Jason Gunthorpe <jgunthorpe@obsidianresearch.com> [core]
Reviewed-By: Devesh Sharma<devesh.sharma@avagotech.com> [ocrdma]
Reviewed-by: default avatarSteve Wise <swise@opengridcomputing.com>
Signed-off-by: default avatarDoug Ledford <dledford@redhat.com>
parent a4d825a0

drivers/infiniband/hw/cxgb3/iwch_mem.c

+0 −31
Original line number Diff line number Diff line
@@ -75,37 +75,6 @@ int iwch_register_mem(struct iwch_dev *rhp, struct iwch_pd *php, 
	return ret;

}



int iwch_reregister_mem(struct iwch_dev *rhp, struct iwch_pd *php,

					struct iwch_mr *mhp,

					int shift,

					int npages)

{

	u32 stag;

	int ret;



	/* We could support this... */

	if (npages > mhp->attr.pbl_size)

		return -ENOMEM;



	stag = mhp->attr.stag;

	if (cxio_reregister_phys_mem(&rhp->rdev,

				   &stag, mhp->attr.pdid,

				   mhp->attr.perms,

				   mhp->attr.zbva,

				   mhp->attr.va_fbo,

				   mhp->attr.len,

				   shift - 12,

				   mhp->attr.pbl_size, mhp->attr.pbl_addr))

		return -ENOMEM;



	ret = iwch_finish_mem_reg(mhp, stag);

	if (ret)

		cxio_dereg_mem(&rhp->rdev, mhp->attr.stag, mhp->attr.pbl_size,

		       mhp->attr.pbl_addr);



	return ret;

}



int iwch_alloc_pbl(struct iwch_mr *mhp, int npages)

{

	mhp->attr.pbl_addr = cxio_hal_pblpool_alloc(&mhp->rhp->rdev,

drivers/infiniband/hw/cxgb3/iwch_provider.c

+0 −69
Original line number Diff line number Diff line
@@ -556,73 +556,6 @@ static struct ib_mr *iwch_register_phys_mem(struct ib_pd *pd, 


}



static int iwch_reregister_phys_mem(struct ib_mr *mr,

				     int mr_rereg_mask,

				     struct ib_pd *pd,

	                             struct ib_phys_buf *buffer_list,

	                             int num_phys_buf,

	                             int acc, u64 * iova_start)

{



	struct iwch_mr mh, *mhp;

	struct iwch_pd *php;

	struct iwch_dev *rhp;

	__be64 *page_list = NULL;

	int shift = 0;

	u64 total_size;

	int npages = 0;

	int ret;



	PDBG("%s ib_mr %p ib_pd %p\n", __func__, mr, pd);



	/* There can be no memory windows */

	if (atomic_read(&mr->usecnt))

		return -EINVAL;



	mhp = to_iwch_mr(mr);

	rhp = mhp->rhp;

	php = to_iwch_pd(mr->pd);



	/* make sure we are on the same adapter */

	if (rhp != php->rhp)

		return -EINVAL;



	memcpy(&mh, mhp, sizeof *mhp);



	if (mr_rereg_mask & IB_MR_REREG_PD)

		php = to_iwch_pd(pd);

	if (mr_rereg_mask & IB_MR_REREG_ACCESS)

		mh.attr.perms = iwch_ib_to_tpt_access(acc);

	if (mr_rereg_mask & IB_MR_REREG_TRANS) {

		ret = build_phys_page_list(buffer_list, num_phys_buf,

					   iova_start,

					   &total_size, &npages,

					   &shift, &page_list);

		if (ret)

			return ret;

	}



	ret = iwch_reregister_mem(rhp, php, &mh, shift, npages);

	kfree(page_list);

	if (ret) {

		return ret;

	}

	if (mr_rereg_mask & IB_MR_REREG_PD)

		mhp->attr.pdid = php->pdid;

	if (mr_rereg_mask & IB_MR_REREG_ACCESS)

		mhp->attr.perms = iwch_ib_to_tpt_access(acc);

	if (mr_rereg_mask & IB_MR_REREG_TRANS) {

		mhp->attr.zbva = 0;

		mhp->attr.va_fbo = *iova_start;

		mhp->attr.page_size = shift - 12;

		mhp->attr.len = (u32) total_size;

		mhp->attr.pbl_size = npages;

	}



	return 0;

}





static struct ib_mr *iwch_reg_user_mr(struct ib_pd *pd, u64 start, u64 length,

				      u64 virt, int acc, struct ib_udata *udata)

{
@@ -1452,8 +1385,6 @@ int iwch_register_device(struct iwch_dev *dev) 
	dev->ibdev.resize_cq = iwch_resize_cq;

	dev->ibdev.poll_cq = iwch_poll_cq;

	dev->ibdev.get_dma_mr = iwch_get_dma_mr;

	dev->ibdev.reg_phys_mr = iwch_register_phys_mem;

	dev->ibdev.rereg_phys_mr = iwch_reregister_phys_mem;

	dev->ibdev.reg_user_mr = iwch_reg_user_mr;

	dev->ibdev.dereg_mr = iwch_dereg_mr;

	dev->ibdev.alloc_mw = iwch_alloc_mw;

drivers/infiniband/hw/cxgb3/iwch_provider.h

+0 −4
Original line number Diff line number Diff line
@@ -341,10 +341,6 @@ void iwch_unregister_device(struct iwch_dev *dev); 
void stop_read_rep_timer(struct iwch_qp *qhp);

int iwch_register_mem(struct iwch_dev *rhp, struct iwch_pd *php,

		      struct iwch_mr *mhp, int shift);

int iwch_reregister_mem(struct iwch_dev *rhp, struct iwch_pd *php,

					struct iwch_mr *mhp,

					int shift,

					int npages);

int iwch_alloc_pbl(struct iwch_mr *mhp, int npages);

void iwch_free_pbl(struct iwch_mr *mhp);

int iwch_write_pbl(struct iwch_mr *mhp, __be64 *pages, int npages, int offset);

drivers/infiniband/hw/cxgb4/iw_cxgb4.h

+0 −11
Original line number Diff line number Diff line
@@ -968,17 +968,6 @@ struct ib_mr *c4iw_reg_user_mr(struct ib_pd *pd, u64 start, 
					   u64 length, u64 virt, int acc,

					   struct ib_udata *udata);

struct ib_mr *c4iw_get_dma_mr(struct ib_pd *pd, int acc);

struct ib_mr *c4iw_register_phys_mem(struct ib_pd *pd,

					struct ib_phys_buf *buffer_list,

					int num_phys_buf,

					int acc,

					u64 *iova_start);

int c4iw_reregister_phys_mem(struct ib_mr *mr,

				     int mr_rereg_mask,

				     struct ib_pd *pd,

				     struct ib_phys_buf *buffer_list,

				     int num_phys_buf,

				     int acc, u64 *iova_start);

int c4iw_dereg_mr(struct ib_mr *ib_mr);

int c4iw_destroy_cq(struct ib_cq *ib_cq);

struct ib_cq *c4iw_create_cq(struct ib_device *ibdev,

drivers/infiniband/hw/cxgb4/mem.c

+0 −248
Original line number Diff line number Diff line
@@ -392,32 +392,6 @@ static int register_mem(struct c4iw_dev *rhp, struct c4iw_pd *php, 
	return ret;

}



static int reregister_mem(struct c4iw_dev *rhp, struct c4iw_pd *php,

			  struct c4iw_mr *mhp, int shift, int npages)

{

	u32 stag;

	int ret;



	if (npages > mhp->attr.pbl_size)

		return -ENOMEM;



	stag = mhp->attr.stag;

	ret = write_tpt_entry(&rhp->rdev, 0, &stag, 1, mhp->attr.pdid,

			      FW_RI_STAG_NSMR, mhp->attr.perms,

			      mhp->attr.mw_bind_enable, mhp->attr.zbva,

			      mhp->attr.va_fbo, mhp->attr.len, shift - 12,

			      mhp->attr.pbl_size, mhp->attr.pbl_addr);

	if (ret)

		return ret;



	ret = finish_mem_reg(mhp, stag);

	if (ret)

		dereg_mem(&rhp->rdev, mhp->attr.stag, mhp->attr.pbl_size,

		       mhp->attr.pbl_addr);



	return ret;

}



static int alloc_pbl(struct c4iw_mr *mhp, int npages)

{

	mhp->attr.pbl_addr = c4iw_pblpool_alloc(&mhp->rhp->rdev,
@@ -431,228 +405,6 @@ static int alloc_pbl(struct c4iw_mr *mhp, int npages) 
	return 0;

}



static int build_phys_page_list(struct ib_phys_buf *buffer_list,

				int num_phys_buf, u64 *iova_start,

				u64 *total_size, int *npages,

				int *shift, __be64 **page_list)

{

	u64 mask;

	int i, j, n;



	mask = 0;

	*total_size = 0;

	for (i = 0; i < num_phys_buf; ++i) {

		if (i != 0 && buffer_list[i].addr & ~PAGE_MASK)

			return -EINVAL;

		if (i != 0 && i != num_phys_buf - 1 &&

		    (buffer_list[i].size & ~PAGE_MASK))

			return -EINVAL;

		*total_size += buffer_list[i].size;

		if (i > 0)

			mask |= buffer_list[i].addr;

		else

			mask |= buffer_list[i].addr & PAGE_MASK;

		if (i != num_phys_buf - 1)

			mask |= buffer_list[i].addr + buffer_list[i].size;

		else

			mask |= (buffer_list[i].addr + buffer_list[i].size +

				PAGE_SIZE - 1) & PAGE_MASK;

	}



	if (*total_size > 0xFFFFFFFFULL)

		return -ENOMEM;



	/* Find largest page shift we can use to cover buffers */

	for (*shift = PAGE_SHIFT; *shift < 27; ++(*shift))

		if ((1ULL << *shift) & mask)

			break;



	buffer_list[0].size += buffer_list[0].addr & ((1ULL << *shift) - 1);

	buffer_list[0].addr &= ~0ull << *shift;



	*npages = 0;

	for (i = 0; i < num_phys_buf; ++i)

		*npages += (buffer_list[i].size +

			(1ULL << *shift) - 1) >> *shift;



	if (!*npages)

		return -EINVAL;



	*page_list = kmalloc(sizeof(u64) * *npages, GFP_KERNEL);

	if (!*page_list)

		return -ENOMEM;



	n = 0;

	for (i = 0; i < num_phys_buf; ++i)

		for (j = 0;

		     j < (buffer_list[i].size + (1ULL << *shift) - 1) >> *shift;

		     ++j)

			(*page_list)[n++] = cpu_to_be64(buffer_list[i].addr +

			    ((u64) j << *shift));



	PDBG("%s va 0x%llx mask 0x%llx shift %d len %lld pbl_size %d\n",

	     __func__, (unsigned long long)*iova_start,

	     (unsigned long long)mask, *shift, (unsigned long long)*total_size,

	     *npages);



	return 0;



}



int c4iw_reregister_phys_mem(struct ib_mr *mr, int mr_rereg_mask,

			     struct ib_pd *pd, struct ib_phys_buf *buffer_list,

			     int num_phys_buf, int acc, u64 *iova_start)

{



	struct c4iw_mr mh, *mhp;

	struct c4iw_pd *php;

	struct c4iw_dev *rhp;

	__be64 *page_list = NULL;

	int shift = 0;

	u64 total_size;

	int npages;

	int ret;



	PDBG("%s ib_mr %p ib_pd %p\n", __func__, mr, pd);



	/* There can be no memory windows */

	if (atomic_read(&mr->usecnt))

		return -EINVAL;



	mhp = to_c4iw_mr(mr);

	rhp = mhp->rhp;

	php = to_c4iw_pd(mr->pd);



	/* make sure we are on the same adapter */

	if (rhp != php->rhp)

		return -EINVAL;



	memcpy(&mh, mhp, sizeof *mhp);



	if (mr_rereg_mask & IB_MR_REREG_PD)

		php = to_c4iw_pd(pd);

	if (mr_rereg_mask & IB_MR_REREG_ACCESS) {

		mh.attr.perms = c4iw_ib_to_tpt_access(acc);

		mh.attr.mw_bind_enable = (acc & IB_ACCESS_MW_BIND) ==

					 IB_ACCESS_MW_BIND;

	}

	if (mr_rereg_mask & IB_MR_REREG_TRANS) {

		ret = build_phys_page_list(buffer_list, num_phys_buf,

						iova_start,

						&total_size, &npages,

						&shift, &page_list);

		if (ret)

			return ret;

	}



	if (mr_exceeds_hw_limits(rhp, total_size)) {

		kfree(page_list);

		return -EINVAL;

	}



	ret = reregister_mem(rhp, php, &mh, shift, npages);

	kfree(page_list);

	if (ret)

		return ret;

	if (mr_rereg_mask & IB_MR_REREG_PD)

		mhp->attr.pdid = php->pdid;

	if (mr_rereg_mask & IB_MR_REREG_ACCESS)

		mhp->attr.perms = c4iw_ib_to_tpt_access(acc);

	if (mr_rereg_mask & IB_MR_REREG_TRANS) {

		mhp->attr.zbva = 0;

		mhp->attr.va_fbo = *iova_start;

		mhp->attr.page_size = shift - 12;

		mhp->attr.len = (u32) total_size;

		mhp->attr.pbl_size = npages;

	}



	return 0;

}



struct ib_mr *c4iw_register_phys_mem(struct ib_pd *pd,

				     struct ib_phys_buf *buffer_list,

				     int num_phys_buf, int acc, u64 *iova_start)

{

	__be64 *page_list;

	int shift;

	u64 total_size;

	int npages;

	struct c4iw_dev *rhp;

	struct c4iw_pd *php;

	struct c4iw_mr *mhp;

	int ret;



	PDBG("%s ib_pd %p\n", __func__, pd);

	php = to_c4iw_pd(pd);

	rhp = php->rhp;



	mhp = kzalloc(sizeof(*mhp), GFP_KERNEL);

	if (!mhp)

		return ERR_PTR(-ENOMEM);



	mhp->rhp = rhp;



	/* First check that we have enough alignment */

	if ((*iova_start & ~PAGE_MASK) != (buffer_list[0].addr & ~PAGE_MASK)) {

		ret = -EINVAL;

		goto err;

	}



	if (num_phys_buf > 1 &&

	    ((buffer_list[0].addr + buffer_list[0].size) & ~PAGE_MASK)) {

		ret = -EINVAL;

		goto err;

	}



	ret = build_phys_page_list(buffer_list, num_phys_buf, iova_start,

					&total_size, &npages, &shift,

					&page_list);

	if (ret)

		goto err;



	if (mr_exceeds_hw_limits(rhp, total_size)) {

		kfree(page_list);

		ret = -EINVAL;

		goto err;

	}



	ret = alloc_pbl(mhp, npages);

	if (ret) {

		kfree(page_list);

		goto err;

	}



	ret = write_pbl(&mhp->rhp->rdev, page_list, mhp->attr.pbl_addr,

			     npages);

	kfree(page_list);

	if (ret)

		goto err_pbl;



	mhp->attr.pdid = php->pdid;

	mhp->attr.zbva = 0;



	mhp->attr.perms = c4iw_ib_to_tpt_access(acc);

	mhp->attr.va_fbo = *iova_start;

	mhp->attr.page_size = shift - 12;



	mhp->attr.len = (u32) total_size;

	mhp->attr.pbl_size = npages;

	ret = register_mem(rhp, php, mhp, shift);

	if (ret)

		goto err_pbl;



	return &mhp->ibmr;



err_pbl:

	c4iw_pblpool_free(&mhp->rhp->rdev, mhp->attr.pbl_addr,

			      mhp->attr.pbl_size << 3);



err:

	kfree(mhp);

	return ERR_PTR(ret);



}



struct ib_mr *c4iw_get_dma_mr(struct ib_pd *pd, int acc)

{

	struct c4iw_dev *rhp;