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Commit b773bb2e authored by Matt Reimer's avatar Matt Reimer Committed by David Woodhouse
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[MTD] [NAND] add s3c2440-specific read_buf/write_buf 



Add read_buf/write_buf for s3c2440, which can read/write 32 bits at a
time rather than just 8. In my testing on an s3c2440a running at 400 MHz
with a 100 MHz HCLK, read performance improves by 36% (from 5.19 MB/s
to 7.07 MB/s).

Signed-off-by: default avatarMatt Reimer <mreimer@vpop.net>
Acked-by: default avatarBen Dooks <ben-linux@fluff.org>
Signed-off-by: default avatarDavid Woodhouse <dwmw2@infradead.org>
parent 19e75ea7

drivers/mtd/nand/s3c2410.c

+14 −0
Original line number Original line Diff line number Diff line
@@ -488,12 +488,24 @@ static void s3c2410_nand_read_buf(struct mtd_info *mtd, u_char *buf, int len) 
	readsb(this->IO_ADDR_R, buf, len);

	readsb(this->IO_ADDR_R, buf, len);

}

}





static void s3c2440_nand_read_buf(struct mtd_info *mtd, u_char *buf, int len)

{

	struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd);

	readsl(info->regs + S3C2440_NFDATA, buf, len / 4);

}



static void s3c2410_nand_write_buf(struct mtd_info *mtd, const u_char *buf, int len)

static void s3c2410_nand_write_buf(struct mtd_info *mtd, const u_char *buf, int len)

{

{

	struct nand_chip *this = mtd->priv;

	struct nand_chip *this = mtd->priv;

	writesb(this->IO_ADDR_W, buf, len);

	writesb(this->IO_ADDR_W, buf, len);

}

}





static void s3c2440_nand_write_buf(struct mtd_info *mtd, const u_char *buf, int len)

{

	struct s3c2410_nand_info *info = s3c2410_nand_mtd_toinfo(mtd);

	writesl(info->regs + S3C2440_NFDATA, buf, len / 4);

}



/* device management functions */

/* device management functions */





static int s3c2410_nand_remove(struct platform_device *pdev)

static int s3c2410_nand_remove(struct platform_device *pdev)
@@ -604,6 +616,8 @@ static void s3c2410_nand_init_chip(struct s3c2410_nand_info *info, 
		info->sel_bit	= S3C2440_NFCONT_nFCE;

		info->sel_bit	= S3C2440_NFCONT_nFCE;

		chip->cmd_ctrl  = s3c2440_nand_hwcontrol;

		chip->cmd_ctrl  = s3c2440_nand_hwcontrol;

		chip->dev_ready = s3c2440_nand_devready;

		chip->dev_ready = s3c2440_nand_devready;

		chip->read_buf  = s3c2440_nand_read_buf;

		chip->write_buf	= s3c2440_nand_write_buf;

		break;

		break;





	case TYPE_S3C2412:

	case TYPE_S3C2412: