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Commit b71752af authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge branch 'drm-fixes-4.9' of git://people.freedesktop.org/~agd5f/linux into drm-fixes 

 Regression fix for powerplay on some iceland boards.

* 'drm-fixes-4.9' of git://people.freedesktop.org/~agd5f/linux:
  drm/amd/powerplay: implement get_clock_by_type for iceland.
  drm/amd/powerplay/smu7: fix checks in smu7_get_evv_voltages (v2)
  drm/amd/powerplay: update phm_get_voltage_evv_on_sclk for iceland
  drm/amd/powerplay: propagate errors in phm_get_voltage_evv_on_sclk
parents e5581fe2 954e6bee

drivers/gpu/drm/amd/powerplay/hwmgr/hwmgr.c

+4 −2
Original line number Diff line number Diff line
@@ -710,8 +710,10 @@ int phm_get_voltage_evv_on_sclk(struct pp_hwmgr *hwmgr, uint8_t voltage_type, 
	uint32_t vol;

	int ret = 0;



	if (hwmgr->chip_id < CHIP_POLARIS10) {

		atomctrl_get_voltage_evv_on_sclk(hwmgr, voltage_type, sclk, id, voltage);

	if (hwmgr->chip_id < CHIP_TONGA) {

		ret = atomctrl_get_voltage_evv(hwmgr, id, voltage);

	} else if (hwmgr->chip_id < CHIP_POLARIS10) {

		ret = atomctrl_get_voltage_evv_on_sclk(hwmgr, voltage_type, sclk, id, voltage);

		if (*voltage >= 2000 || *voltage == 0)

			*voltage = 1150;

	} else {

drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c

+43 −25
Original line number Diff line number Diff line
@@ -1460,19 +1460,19 @@ static int smu7_get_evv_voltages(struct pp_hwmgr *hwmgr) 
	struct phm_ppt_v1_clock_voltage_dependency_table *sclk_table = NULL;





	if (table_info == NULL)

		return -EINVAL;



	sclk_table = table_info->vdd_dep_on_sclk;



	for (i = 0; i < SMU7_MAX_LEAKAGE_COUNT; i++) {

		vv_id = ATOM_VIRTUAL_VOLTAGE_ID0 + i;



		if (data->vdd_gfx_control == SMU7_VOLTAGE_CONTROL_BY_SVID2) {

			if (0 == phm_get_sclk_for_voltage_evv(hwmgr,

			if ((hwmgr->pp_table_version == PP_TABLE_V1)

			    && !phm_get_sclk_for_voltage_evv(hwmgr,

						table_info->vddgfx_lookup_table, vv_id, &sclk)) {

				if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,

							PHM_PlatformCaps_ClockStretcher)) {

					if (table_info == NULL)

						return -EINVAL;

					sclk_table = table_info->vdd_dep_on_sclk;



					for (j = 1; j < sclk_table->count; j++) {

						if (sclk_table->entries[j].clk == sclk &&

								sclk_table->entries[j].cks_enable == 0) {
@@ -1498,12 +1498,15 @@ static int smu7_get_evv_voltages(struct pp_hwmgr *hwmgr) 
				}

			}

		} else {



			if ((hwmgr->pp_table_version == PP_TABLE_V0)

				|| !phm_get_sclk_for_voltage_evv(hwmgr,

					table_info->vddc_lookup_table, vv_id, &sclk)) {

				if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,

						PHM_PlatformCaps_ClockStretcher)) {

					if (table_info == NULL)

						return -EINVAL;

					sclk_table = table_info->vdd_dep_on_sclk;



					for (j = 1; j < sclk_table->count; j++) {

						if (sclk_table->entries[j].clk == sclk &&

								sclk_table->entries[j].cks_enable == 0) {
@@ -4230,18 +4233,26 @@ static int smu7_get_sclks(struct pp_hwmgr *hwmgr, struct amd_pp_clocks *clocks) 
{

	struct phm_ppt_v1_information *table_info =

			(struct phm_ppt_v1_information *)hwmgr->pptable;

	struct phm_ppt_v1_clock_voltage_dependency_table *dep_sclk_table;

	struct phm_ppt_v1_clock_voltage_dependency_table *dep_sclk_table = NULL;

	struct phm_clock_voltage_dependency_table *sclk_table;

	int i;



	if (table_info == NULL)

	if (hwmgr->pp_table_version == PP_TABLE_V1) {

		if (table_info == NULL || table_info->vdd_dep_on_sclk == NULL)

			return -EINVAL;



		dep_sclk_table = table_info->vdd_dep_on_sclk;



		for (i = 0; i < dep_sclk_table->count; i++) {

			clocks->clock[i] = dep_sclk_table->entries[i].clk;

			clocks->count++;

		}

	} else if (hwmgr->pp_table_version == PP_TABLE_V0) {

		sclk_table = hwmgr->dyn_state.vddc_dependency_on_sclk;

		for (i = 0; i < sclk_table->count; i++) {

			clocks->clock[i] = sclk_table->entries[i].clk;

			clocks->count++;

		}

	}



	return 0;

}
@@ -4263,18 +4274,25 @@ static int smu7_get_mclks(struct pp_hwmgr *hwmgr, struct amd_pp_clocks *clocks) 
			(struct phm_ppt_v1_information *)hwmgr->pptable;

	struct phm_ppt_v1_clock_voltage_dependency_table *dep_mclk_table;

	int i;

	struct phm_clock_voltage_dependency_table *mclk_table;



	if (hwmgr->pp_table_version == PP_TABLE_V1) {

		if (table_info == NULL)

			return -EINVAL;



		dep_mclk_table = table_info->vdd_dep_on_mclk;



		for (i = 0; i < dep_mclk_table->count; i++) {

			clocks->clock[i] = dep_mclk_table->entries[i].clk;

			clocks->latency[i] = smu7_get_mem_latency(hwmgr,

						dep_mclk_table->entries[i].clk);

			clocks->count++;

		}

	} else if (hwmgr->pp_table_version == PP_TABLE_V0) {

		mclk_table = hwmgr->dyn_state.vddc_dependency_on_mclk;

		for (i = 0; i < mclk_table->count; i++) {

			clocks->clock[i] = mclk_table->entries[i].clk;

			clocks->count++;

		}

	}

	return 0;

}