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Commit b660d3ad authored by Ben M Cahill's avatar Ben M Cahill Committed by John W. Linville
Browse files

iwlagn, iwl3945: remove apm_reset() functions



Clean up device-specific apm_reset() functions and library infrastructure,
now that these reset() functions are no longer being used.

Signed-off-by: default avatarBen Cahill <ben.m.cahill@intel.com>
Signed-off-by: default avatarReinette Chatre <reinette.chatre@intel.com>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent 278d8405
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+0 −1
Original line number Diff line number Diff line
@@ -111,7 +111,6 @@ static struct iwl_lib_ops iwl1000_lib = {
	.update_chain_flags = iwl_update_chain_flags,
	.apm_ops = {
		.init =	iwl5000_apm_init,
		.reset = iwl5000_apm_reset,
		.stop = iwl_apm_stop,
		.config = iwl1000_nic_config,
		.set_pwr_src = iwl_set_pwr_src,
+0 −42
Original line number Diff line number Diff line
@@ -1198,47 +1198,6 @@ void iwl3945_hw_txq_ctx_stop(struct iwl_priv *priv)
	iwl3945_hw_txq_ctx_free(priv);
}

static int iwl3945_apm_reset(struct iwl_priv *priv)
{
	iwl_apm_stop_master(priv);


	iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
	udelay(10);

	iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);

	iwl_poll_bit(priv, CSR_GP_CNTRL,
			CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
			CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);

	iwl_write_prph(priv, APMG_CLK_CTRL_REG,
				APMG_CLK_VAL_BSM_CLK_RQT);

	iwl_write_prph(priv, APMG_RTC_INT_MSK_REG, 0x0);
	iwl_write_prph(priv, APMG_RTC_INT_STT_REG,
					0xFFFFFFFF);

	/* enable DMA */
	iwl_write_prph(priv, APMG_CLK_EN_REG,
				APMG_CLK_VAL_DMA_CLK_RQT |
				APMG_CLK_VAL_BSM_CLK_RQT);
	udelay(10);

	iwl_set_bits_prph(priv, APMG_PS_CTRL_REG,
				APMG_PS_CTRL_VAL_RESET_REQ);
	udelay(5);
	iwl_clear_bits_prph(priv, APMG_PS_CTRL_REG,
				APMG_PS_CTRL_VAL_RESET_REQ);

	/* Clear the 'host command active' bit... */
	clear_bit(STATUS_HCMD_ACTIVE, &priv->status);

	wake_up_interruptible(&priv->wait_command_queue);

	return 0;
}

/**
 * iwl3945_hw_reg_adjust_power_by_temp
 * return index delta into power gain settings table
@@ -2833,7 +2792,6 @@ static struct iwl_lib_ops iwl3945_lib = {
	.dump_nic_error_log = iwl3945_dump_nic_error_log,
	.apm_ops = {
		.init = iwl3945_apm_init,
		.reset = iwl3945_apm_reset,
		.stop = iwl_apm_stop,
		.config = iwl3945_nic_config,
		.set_pwr_src = iwl3945_set_pwr_src,
+0 −41
Original line number Diff line number Diff line
@@ -397,46 +397,6 @@ static void iwl4965_nic_config(struct iwl_priv *priv)
	spin_unlock_irqrestore(&priv->lock, flags);
}

static int iwl4965_apm_reset(struct iwl_priv *priv)
{
	int ret = 0;

	iwl_apm_stop_master(priv);


	iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);

	udelay(10);

	/* FIXME: put here L1A -L0S w/a */

	iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);

	ret = iwl_poll_bit(priv, CSR_GP_CNTRL,
			CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
			CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
	if (ret < 0)
		goto out;

	udelay(10);

	/* Enable DMA and BSM Clock */
	iwl_write_prph(priv, APMG_CLK_EN_REG, APMG_CLK_VAL_DMA_CLK_RQT |
					      APMG_CLK_VAL_BSM_CLK_RQT);

	udelay(10);

	/* disable L1A */
	iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
			  APMG_PCIDEV_STT_VAL_L1_ACT_DIS);

	clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
	wake_up_interruptible(&priv->wait_command_queue);

out:
	return ret;
}

/* Reset differential Rx gains in NIC to prepare for chain noise calibration.
 * Called after every association, but this runs only once!
 *  ... once chain noise is calibrated the first time, it's good forever.  */
@@ -2273,7 +2233,6 @@ static struct iwl_lib_ops iwl4965_lib = {
	.dump_nic_error_log = iwl_dump_nic_error_log,
	.apm_ops = {
		.init = iwl4965_apm_init,
		.reset = iwl4965_apm_reset,
		.stop = iwl_apm_stop,
		.config = iwl4965_nic_config,
		.set_pwr_src = iwl_set_pwr_src,
+0 −45
Original line number Diff line number Diff line
@@ -118,49 +118,6 @@ int iwl5000_apm_init(struct iwl_priv *priv)
	return ret;
}

int iwl5000_apm_reset(struct iwl_priv *priv)
{
	int ret = 0;

	iwl_apm_stop_master(priv);

	iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);

	udelay(10);


	/* FIXME: put here L1A -L0S w/a */

	if (priv->cfg->need_pll_cfg)
		iwl_set_bit(priv, CSR_ANA_PLL_CFG, CSR50_ANA_PLL_CFG_VAL);

	/* set "initialization complete" bit to move adapter
	 * D0U* --> D0A* state */
	iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);

	/* wait for clock stabilization */
	ret = iwl_poll_bit(priv, CSR_GP_CNTRL,
			CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
			CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
	if (ret < 0) {
		IWL_DEBUG_INFO(priv, "Failed to init the card\n");
		goto out;
	}

	/* enable DMA */
	iwl_write_prph(priv, APMG_CLK_EN_REG, APMG_CLK_VAL_DMA_CLK_RQT);

	udelay(20);

	/* disable L1-Active */
	iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
			  APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
out:

	return ret;
}


/* NIC configuration for 5000 series */
void iwl5000_nic_config(struct iwl_priv *priv)
{
@@ -1522,7 +1479,6 @@ struct iwl_lib_ops iwl5000_lib = {
	.update_chain_flags = iwl_update_chain_flags,
	.apm_ops = {
		.init =	iwl5000_apm_init,
		.reset = iwl5000_apm_reset,
		.stop = iwl_apm_stop,
		.config = iwl5000_nic_config,
		.set_pwr_src = iwl_set_pwr_src,
@@ -1574,7 +1530,6 @@ static struct iwl_lib_ops iwl5150_lib = {
	.update_chain_flags = iwl_update_chain_flags,
	.apm_ops = {
		.init =	iwl5000_apm_init,
		.reset = iwl5000_apm_reset,
		.stop = iwl_apm_stop,
		.config = iwl5000_nic_config,
		.set_pwr_src = iwl_set_pwr_src,
+0 −1
Original line number Diff line number Diff line
@@ -192,7 +192,6 @@ static struct iwl_lib_ops iwl6000_lib = {
	.update_chain_flags = iwl_update_chain_flags,
	.apm_ops = {
		.init =	iwl5000_apm_init,
		.reset = iwl5000_apm_reset,
		.stop = iwl_apm_stop,
		.config = iwl6000_nic_config,
		.set_pwr_src = iwl_set_pwr_src,
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