Loading drivers/gpu/msm/adreno_a6xx_preempt.c +8 −9 Original line number Diff line number Diff line /* Copyright (c) 2017, The Linux Foundation. All rights reserved. /* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -370,14 +370,6 @@ void a6xx_preemption_trigger(struct adreno_device *adreno_dev) /* Trigger the preemption */ adreno_gmu_fenced_write(adreno_dev, ADRENO_REG_CP_PREEMPT, cntl, FENCE_STATUS_WRITEDROPPED1_MASK); /* * Once preemption has been requested with the final register write, * the preemption process starts and the GPU is considered busy. * We can now safely clear the preemption keepalive bit, allowing * power collapse to resume its regular activity. */ kgsl_gmu_regrmw(device, A6XX_GMU_AO_SPARE_CNTL, 0x2, 0x0); } void a6xx_preemption_callback(struct adreno_device *adreno_dev, int bit) Loading Loading @@ -405,6 +397,13 @@ void a6xx_preemption_callback(struct adreno_device *adreno_dev, int bit) return; } /* * We can now safely clear the preemption keepalive bit, allowing * power collapse to resume its regular activity. */ kgsl_gmu_regrmw(KGSL_DEVICE(adreno_dev), A6XX_GMU_AO_SPARE_CNTL, 0x2, 0x0); del_timer(&adreno_dev->preempt.timer); adreno_readreg(adreno_dev, ADRENO_REG_CP_PREEMPT_LEVEL_STATUS, &status); Loading Loading
drivers/gpu/msm/adreno_a6xx_preempt.c +8 −9 Original line number Diff line number Diff line /* Copyright (c) 2017, The Linux Foundation. All rights reserved. /* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -370,14 +370,6 @@ void a6xx_preemption_trigger(struct adreno_device *adreno_dev) /* Trigger the preemption */ adreno_gmu_fenced_write(adreno_dev, ADRENO_REG_CP_PREEMPT, cntl, FENCE_STATUS_WRITEDROPPED1_MASK); /* * Once preemption has been requested with the final register write, * the preemption process starts and the GPU is considered busy. * We can now safely clear the preemption keepalive bit, allowing * power collapse to resume its regular activity. */ kgsl_gmu_regrmw(device, A6XX_GMU_AO_SPARE_CNTL, 0x2, 0x0); } void a6xx_preemption_callback(struct adreno_device *adreno_dev, int bit) Loading Loading @@ -405,6 +397,13 @@ void a6xx_preemption_callback(struct adreno_device *adreno_dev, int bit) return; } /* * We can now safely clear the preemption keepalive bit, allowing * power collapse to resume its regular activity. */ kgsl_gmu_regrmw(KGSL_DEVICE(adreno_dev), A6XX_GMU_AO_SPARE_CNTL, 0x2, 0x0); del_timer(&adreno_dev->preempt.timer); adreno_readreg(adreno_dev, ADRENO_REG_CP_PREEMPT_LEVEL_STATUS, &status); Loading