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Commit b5ff196c authored by Kyle Yan's avatar Kyle Yan Committed by Gerrit - the friendly Code Review server
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Merge "clk: qcom: mdss: Add mdss pll clock driver support" into msm-4.8

parents 69242596 83e27fcd
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Qualcomm Technologies MDSS pll for DSI/EDP/HDMI

mdss-pll is a pll controller device which supports pll devices that
are compatible with MIPI display serial interface specification,
HDMI and edp.

Required properties:
- compatible:		Compatible name used in the driver
                        "qcom,mdss_dsi_pll_8916", "qcom,mdss_dsi_pll_8939",
                        "qcom,mdss_dsi_pll_8974", "qcom,mdss_dsi_pll_8994",
                        "qcom,mdss_dsi_pll_8994", "qcom,mdss_dsi_pll_8909",
                        "qcom,mdss_hdmi_pll", "qcom,mdss_hdmi_pll_8994",
                        "qcom,mdss_dsi_pll_8992", "qcom,mdss_hdmi_pll_8992",
                        "qcom,mdss_dsi_pll_8996", "qcom,mdss_hdmi_pll_8996",
                        "qcom,mdss_hdmi_pll_8996_v2", "qcom,mdss_dsi_pll_8996_v2",
                        "qcom,mdss_hdmi_pll_8996_v3", "qcom,mdss_hdmi_pll_8996_v3_1p8",
                        "qcom,mdss_edp_pll_8996_v3", "qcom,mdss_edp_pll_8996_v3_1p8",
                        "qcom,mdss_dsi_pll_8998", "qcom,mdss_dp_pll_8998",
                        "qcom,mdss_hdmi_pll_8998"
- cell-index:		Specifies the controller used
- reg:			offset and length of the register set for the device.
- reg-names :		names to refer to register sets related to this device
- gdsc-supply:		Phandle for gdsc regulator device node.
- vddio-supply:		Phandle for vddio regulator device node.
- clock-names:		List of clock names needed by the device.
- clock-rate:		List of clock rates in Hz.

Optional properties:
- label:	       	A string used to describe the driver used.

- qcom,platform-supply-entries:	A node that lists the elements of the supply. There
				can be more than one instance of this binding,
				in which case the entry would be appended with
				the supply entry index.
				e.g. qcom,platform-supply-entry@0
				- reg: offset and length of the register set for the device.
				-- qcom,supply-name: name of the supply (vdd/vdda/vddio)
				-- qcom,supply-min-voltage: minimum voltage level (uV)
				-- qcom,supply-max-voltage: maximum voltage level (uV)
				-- qcom,supply-enable-load: load drawn (uA) from enabled supply
				-- qcom,supply-disable-load: load drawn (uA) from disabled supply
				-- qcom,supply-pre-on-sleep: time to sleep (ms) before turning on
				-- qcom,supply-post-on-sleep: time to sleep (ms) after turning on
				-- qcom,supply-pre-off-sleep: time to sleep (ms) before turning off
				-- qcom,supply-post-off-sleep: time to sleep (ms) after turning off

Example:
	mdss_dsi0_pll: qcom,mdss_dsi_pll@fd922A00 {
		compatible = "qcom,mdss_dsi_pll";
		label = "MDSS DSI 0 PLL";
		cell-index = <0>;

		reg = <0xfd922A00 0xD4>;
		reg-names = "pll_base";
		gdsc-supply = <&gdsc_mdss>;
		vddio-supply = <&pm8941_l12>;

		clock-names = "mdp_core_clk", "iface_clk", "bus_clk";
		clock-rate = <0>, <0>, <0>;

		qcom,platform-supply-entries {
			#address-cells = <1>;
			#size-cells = <0>;

			qcom,platform-supply-entry@0 {
				reg = <0>;
				qcom,supply-name = "vddio";
				qcom,supply-min-voltage = <1800000>;
				qcom,supply-max-voltage = <1800000>;
				qcom,supply-enable-load = <100000>;
				qcom,supply-disable-load = <100>;
				qcom,supply-pre-on-sleep = <0>;
				qcom,supply-post-on-sleep = <20>;
				qcom,supply-pre-off-sleep = <0>;
				qcom,supply-post-off-sleep = <0>;
			};
		};
	};
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config MSM_MDSS_PLL
	bool "MDSS pll programming"
	---help---
	It provides support for DSI, eDP and HDMI interface pll programming on MDSS
	hardware. It also handles the pll specific resources and turn them on/off when
	mdss pll client tries to enable/disable pll clocks.
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obj-$(CONFIG_MSM_MDSS_PLL) += mdss-pll-util.o
obj-$(CONFIG_MSM_MDSS_PLL) += mdss-pll.o
obj-$(CONFIG_MSM_MDSS_PLL) += mdss-dsi-pll-28hpm.o
obj-$(CONFIG_MSM_MDSS_PLL) += mdss-edp-pll-28hpm.o
obj-$(CONFIG_MSM_MDSS_PLL) += mdss-hdmi-pll-28hpm.o
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