Loading Documentation/devicetree/bindings/drm/msm/sde-dsi.txt +3 −2 Original line number Diff line number Diff line Loading @@ -6,8 +6,9 @@ that are compatible with MIPI display serial interface specification. DSI Controller: Required properties: - compatible: Should be "qcom,dsi-ctrl-hw-v<version>". Supported versions include 1.4 and 2.0. eg: qcom,dsi-ctrl-hw-v1.4, qcom,dsi-ctrl-hw-v2.0 versions include 1.4, 2.0 and 2.2. eg: qcom,dsi-ctrl-hw-v1.4, qcom,dsi-ctrl-hw-v2.0, qcom,dsi-ctrl-hw-v2.2 And for dsi phy driver: qcom,dsi-phy-v0.0-hpm, qcom,dsi-phy-v0.0-lpm, qcom,dsi-phy-v1.0, qcom,dsi-phy-v2.0, Loading arch/arm64/boot/dts/qcom/sdm845-sde.dtsi +8 −6 Original line number Diff line number Diff line Loading @@ -273,12 +273,13 @@ }; mdss_dsi0: qcom,mdss_dsi_ctrl0@ae94000 { compatible = "qcom,dsi-ctrl-hw-v2.0"; compatible = "qcom,dsi-ctrl-hw-v2.2"; label = "dsi-ctrl-0"; status = "disabled"; cell-index = <0>; reg = <0xae94000 0x400>; reg-names = "dsi_ctrl"; reg = <0xae94000 0x400>, <0xaf08000 0x4>; reg-names = "dsi_ctrl", "disp_cc_base"; interrupt-parent = <&mdss_mdp>; interrupts = <4 0>; vdda-1p2-supply = <&pm8998_l26>; Loading Loading @@ -315,12 +316,13 @@ }; mdss_dsi1: qcom,mdss_dsi_ctrl1@ae96000 { compatible = "qcom,dsi-ctrl-hw-v2.0"; compatible = "qcom,dsi-ctrl-hw-v2.2"; label = "dsi-ctrl-1"; status = "disabled"; cell-index = <1>; reg = <0xae96000 0x400>; reg-names = "dsi_ctrl"; reg = <0xae96000 0x400>, <0xaf08000 0x4>; reg-names = "dsi_ctrl", "disp_cc_base"; interrupt-parent = <&mdss_mdp>; interrupts = <5 0>; vdda-1p2-supply = <&pm8998_l26>; Loading drivers/gpu/drm/msm/Makefile +1 −0 Original line number Diff line number Diff line Loading @@ -109,6 +109,7 @@ msm_drm-$(CONFIG_DRM_MSM_DSI_STAGING) += dsi-staging/dsi_phy.o \ dsi-staging/dsi_ctrl_hw_cmn.o \ dsi-staging/dsi_ctrl_hw_1_4.o \ dsi-staging/dsi_ctrl_hw_2_0.o \ dsi-staging/dsi_ctrl_hw_2_2.o \ dsi-staging/dsi_ctrl.o \ dsi-staging/dsi_catalog.o \ dsi-staging/dsi_drm.o \ Loading drivers/gpu/drm/msm/dsi-staging/dsi_catalog.c +14 −0 Original line number Diff line number Diff line Loading @@ -83,6 +83,19 @@ static void dsi_catalog_cmn_init(struct dsi_ctrl_hw *ctrl, ctrl->ops.clamp_enable = NULL; ctrl->ops.clamp_disable = NULL; break; case DSI_CTRL_VERSION_2_2: ctrl->ops.phy_reset_config = dsi_ctrl_hw_22_phy_reset_config; ctrl->ops.setup_lane_map = dsi_ctrl_hw_20_setup_lane_map; ctrl->ops.wait_for_lane_idle = dsi_ctrl_hw_20_wait_for_lane_idle; ctrl->ops.reg_dump_to_buffer = dsi_ctrl_hw_20_reg_dump_to_buffer; ctrl->ops.ulps_ops.ulps_request = NULL; ctrl->ops.ulps_ops.ulps_exit = NULL; ctrl->ops.ulps_ops.get_lanes_in_ulps = NULL; ctrl->ops.clamp_enable = NULL; ctrl->ops.clamp_disable = NULL; break; default: break; } Loading Loading @@ -121,6 +134,7 @@ int dsi_catalog_ctrl_setup(struct dsi_ctrl_hw *ctrl, switch (version) { case DSI_CTRL_VERSION_1_4: case DSI_CTRL_VERSION_2_0: case DSI_CTRL_VERSION_2_2: dsi_catalog_cmn_init(ctrl, version); break; default: Loading drivers/gpu/drm/msm/dsi-staging/dsi_catalog.h +2 −0 Original line number Diff line number Diff line Loading @@ -157,6 +157,8 @@ void dsi_ctrl_hw_cmn_trigger_command_dma(struct dsi_ctrl_hw *ctrl); void dsi_ctrl_hw_dln0_phy_err(struct dsi_ctrl_hw *ctrl); void dsi_ctrl_hw_cmn_phy_reset_config(struct dsi_ctrl_hw *ctrl, bool enable); void dsi_ctrl_hw_22_phy_reset_config(struct dsi_ctrl_hw *ctrl, bool enable); /* Definitions specific to 1.4 DSI controller hardware */ int dsi_ctrl_hw_14_wait_for_lane_idle(struct dsi_ctrl_hw *ctrl, u32 lanes); Loading Loading
Documentation/devicetree/bindings/drm/msm/sde-dsi.txt +3 −2 Original line number Diff line number Diff line Loading @@ -6,8 +6,9 @@ that are compatible with MIPI display serial interface specification. DSI Controller: Required properties: - compatible: Should be "qcom,dsi-ctrl-hw-v<version>". Supported versions include 1.4 and 2.0. eg: qcom,dsi-ctrl-hw-v1.4, qcom,dsi-ctrl-hw-v2.0 versions include 1.4, 2.0 and 2.2. eg: qcom,dsi-ctrl-hw-v1.4, qcom,dsi-ctrl-hw-v2.0, qcom,dsi-ctrl-hw-v2.2 And for dsi phy driver: qcom,dsi-phy-v0.0-hpm, qcom,dsi-phy-v0.0-lpm, qcom,dsi-phy-v1.0, qcom,dsi-phy-v2.0, Loading
arch/arm64/boot/dts/qcom/sdm845-sde.dtsi +8 −6 Original line number Diff line number Diff line Loading @@ -273,12 +273,13 @@ }; mdss_dsi0: qcom,mdss_dsi_ctrl0@ae94000 { compatible = "qcom,dsi-ctrl-hw-v2.0"; compatible = "qcom,dsi-ctrl-hw-v2.2"; label = "dsi-ctrl-0"; status = "disabled"; cell-index = <0>; reg = <0xae94000 0x400>; reg-names = "dsi_ctrl"; reg = <0xae94000 0x400>, <0xaf08000 0x4>; reg-names = "dsi_ctrl", "disp_cc_base"; interrupt-parent = <&mdss_mdp>; interrupts = <4 0>; vdda-1p2-supply = <&pm8998_l26>; Loading Loading @@ -315,12 +316,13 @@ }; mdss_dsi1: qcom,mdss_dsi_ctrl1@ae96000 { compatible = "qcom,dsi-ctrl-hw-v2.0"; compatible = "qcom,dsi-ctrl-hw-v2.2"; label = "dsi-ctrl-1"; status = "disabled"; cell-index = <1>; reg = <0xae96000 0x400>; reg-names = "dsi_ctrl"; reg = <0xae96000 0x400>, <0xaf08000 0x4>; reg-names = "dsi_ctrl", "disp_cc_base"; interrupt-parent = <&mdss_mdp>; interrupts = <5 0>; vdda-1p2-supply = <&pm8998_l26>; Loading
drivers/gpu/drm/msm/Makefile +1 −0 Original line number Diff line number Diff line Loading @@ -109,6 +109,7 @@ msm_drm-$(CONFIG_DRM_MSM_DSI_STAGING) += dsi-staging/dsi_phy.o \ dsi-staging/dsi_ctrl_hw_cmn.o \ dsi-staging/dsi_ctrl_hw_1_4.o \ dsi-staging/dsi_ctrl_hw_2_0.o \ dsi-staging/dsi_ctrl_hw_2_2.o \ dsi-staging/dsi_ctrl.o \ dsi-staging/dsi_catalog.o \ dsi-staging/dsi_drm.o \ Loading
drivers/gpu/drm/msm/dsi-staging/dsi_catalog.c +14 −0 Original line number Diff line number Diff line Loading @@ -83,6 +83,19 @@ static void dsi_catalog_cmn_init(struct dsi_ctrl_hw *ctrl, ctrl->ops.clamp_enable = NULL; ctrl->ops.clamp_disable = NULL; break; case DSI_CTRL_VERSION_2_2: ctrl->ops.phy_reset_config = dsi_ctrl_hw_22_phy_reset_config; ctrl->ops.setup_lane_map = dsi_ctrl_hw_20_setup_lane_map; ctrl->ops.wait_for_lane_idle = dsi_ctrl_hw_20_wait_for_lane_idle; ctrl->ops.reg_dump_to_buffer = dsi_ctrl_hw_20_reg_dump_to_buffer; ctrl->ops.ulps_ops.ulps_request = NULL; ctrl->ops.ulps_ops.ulps_exit = NULL; ctrl->ops.ulps_ops.get_lanes_in_ulps = NULL; ctrl->ops.clamp_enable = NULL; ctrl->ops.clamp_disable = NULL; break; default: break; } Loading Loading @@ -121,6 +134,7 @@ int dsi_catalog_ctrl_setup(struct dsi_ctrl_hw *ctrl, switch (version) { case DSI_CTRL_VERSION_1_4: case DSI_CTRL_VERSION_2_0: case DSI_CTRL_VERSION_2_2: dsi_catalog_cmn_init(ctrl, version); break; default: Loading
drivers/gpu/drm/msm/dsi-staging/dsi_catalog.h +2 −0 Original line number Diff line number Diff line Loading @@ -157,6 +157,8 @@ void dsi_ctrl_hw_cmn_trigger_command_dma(struct dsi_ctrl_hw *ctrl); void dsi_ctrl_hw_dln0_phy_err(struct dsi_ctrl_hw *ctrl); void dsi_ctrl_hw_cmn_phy_reset_config(struct dsi_ctrl_hw *ctrl, bool enable); void dsi_ctrl_hw_22_phy_reset_config(struct dsi_ctrl_hw *ctrl, bool enable); /* Definitions specific to 1.4 DSI controller hardware */ int dsi_ctrl_hw_14_wait_for_lane_idle(struct dsi_ctrl_hw *ctrl, u32 lanes); Loading