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Commit b4cc2b75 authored by Adam Ford's avatar Adam Ford Committed by Tony Lindgren
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ARM: dts: LogicPD Torpedo: Set HSUSB0 Pin Mux 



This patch defines the pin muxing to configure the hsusb0 through
the twl4030 PMIC, because we can't always assume the bootloader will
do it correctly.

Signed-off-by: default avatarAdam Ford <aford173@gmail.com>
Signed-off-by: default avatarTony Lindgren <tony@atomide.com>
parent f21b9873

arch/arm/boot/dts/logicpd-torpedo-37xx-devkit.dts

+2 −0
Original line number Original line Diff line number Diff line
@@ -378,6 +378,8 @@ 




/* Wired to the tps65950 on the SOM, only the USB connector is on the devkit */

/* Wired to the tps65950 on the SOM, only the USB connector is on the devkit */

&usb_otg_hs {

&usb_otg_hs {

	pinctrl-names = "default";

	pinctrl-0 = <&hsusb_otg_pins>;

	interface-type = <0>;

	interface-type = <0>;

	usb-phy = <&usb2_phy>;

	usb-phy = <&usb2_phy>;

	phys = <&usb2_phy>;

	phys = <&usb2_phy>;

arch/arm/boot/dts/logicpd-torpedo-som.dtsi

+17 −1
Original line number Original line Diff line number Diff line
@@ -187,7 +187,23 @@ 
			OMAP3_CORE1_IOPAD(0x21ce, PIN_OUTPUT | MUX_MODE0)       /* mcspi1_cs0.mcspi1_cs0 */

			OMAP3_CORE1_IOPAD(0x21ce, PIN_OUTPUT | MUX_MODE0)       /* mcspi1_cs0.mcspi1_cs0 */

		>;

		>;

	};

	};



	hsusb_otg_pins: pinmux_hsusb_otg_pins {

		pinctrl-single,pins = <

			OMAP3_CORE1_IOPAD(0x21a2, PIN_INPUT | MUX_MODE0)	/* hsusb0_clk.hsusb0_clk */

			OMAP3_CORE1_IOPAD(0x21a4, PIN_OUTPUT | MUX_MODE0)	/* hsusb0_stp.hsusb0_stp */

			OMAP3_CORE1_IOPAD(0x21a6, PIN_INPUT | MUX_MODE0)	/* hsusb0_dir.hsusb0_dir */

			OMAP3_CORE1_IOPAD(0x21a8, PIN_INPUT | MUX_MODE0)	/* hsusb0_nxt.hsusb0_nxt */



			OMAP3_CORE1_IOPAD(0x21aa, PIN_INPUT | MUX_MODE0)	/* hsusb0_data0.hsusb0_data0 */

			OMAP3_CORE1_IOPAD(0x21ac, PIN_INPUT | MUX_MODE0)	/* hsusb0_data1.hsusb0_data1 */

			OMAP3_CORE1_IOPAD(0x21ae, PIN_INPUT | MUX_MODE0)	/* hsusb0_data2.hsusb0_data2 */

			OMAP3_CORE1_IOPAD(0x21b0, PIN_INPUT | MUX_MODE0)	/* hsusb0_data3.hsusb0_data3 */

			OMAP3_CORE1_IOPAD(0x21b2, PIN_INPUT | MUX_MODE0)	/* hsusb0_data4.hsusb0_data4 */

			OMAP3_CORE1_IOPAD(0x21b4, PIN_INPUT | MUX_MODE0)	/* hsusb0_data5.hsusb0_data5 */

			OMAP3_CORE1_IOPAD(0x21b6, PIN_INPUT | MUX_MODE0)	/* hsusb0_data6.hsusb0_data6 */

			OMAP3_CORE1_IOPAD(0x21b8, PIN_INPUT | MUX_MODE0)	/* hsusb0_data7.hsusb0_data7 */

		>;

	};

};

};





&uart2 {

&uart2 {