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Commit b450e177 authored by Patrik Jakobsson's avatar Patrik Jakobsson Committed by Imre Deak
Browse files

drm/i915: Do not warn on PG2 enabled in gen9_disable_dc5() 



PG2 enabled is not a requirement for disabling DC5. It's just one
of the reasons why the DMC wouldn't enter DC5. During modeset we don't
care about PG2 from a DC perspective, only the fact that DC5/DC6 is not
allowed.

Signed-off-by: default avatarPatrik Jakobsson <patrik.jakobsson@linux.intel.com>
Reviewed-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: default avatarImre Deak <imre.deak@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1447084107-8521-9-git-send-email-patrik.jakobsson@linux.intel.com
parent dfa57627

drivers/gpu/drm/i915/intel_runtime_pm.c

+0 −3
Original line number Diff line number Diff line
@@ -467,8 +467,6 @@ static void assert_can_enable_dc5(struct drm_i915_private *dev_priv) 


static void assert_can_disable_dc5(struct drm_i915_private *dev_priv)

{

	bool pg2_enabled = intel_display_power_well_is_enabled(dev_priv,

					SKL_DISP_PW_2);

	/*

	 * During initialization, the firmware may not be loaded yet.

	 * We still want to make sure that the DC enabling flag is cleared.
@@ -476,7 +474,6 @@ static void assert_can_disable_dc5(struct drm_i915_private *dev_priv) 
	if (dev_priv->power_domains.initializing)

		return;



	WARN_ONCE(!pg2_enabled, "PG2 not enabled to disable DC5.\n");

	WARN_ONCE(dev_priv->pm.suspended,

		"Disabling of DC5 while platform is runtime-suspended should never happen.\n");

}