Merge "msm: kgsl: Track RSCC sleep sequence state" (b43bab84) · Commits · e / devices / android_kernel_fairphone_FP3

drivers/gpu/msm/adreno_a6xx.c

+12 −3

Original line number	Diff line number	Diff line
		@@ -1708,6 +1708,10 @@ static int a6xx_rpmh_power_on_gpu(struct kgsl_device *device)
		struct device *dev = &gmu->pdev->dev;
		int val;

		/* Only trigger wakeup sequence if sleep sequence was done earlier */
		if (!test_bit(GMU_RSCC_SLEEP_SEQ_DONE, &gmu->flags))
		return 0;

		kgsl_gmu_regread(device, A6XX_GPU_CC_GX_DOMAIN_MISC, &val);
		if (!(val & 0x1))
		dev_err_ratelimited(&gmu->pdev->dev,
		@@ -1737,6 +1741,9 @@ static int a6xx_rpmh_power_on_gpu(struct kgsl_device *device)

		kgsl_gmu_regwrite(device, A6XX_GMU_RSCC_CONTROL_REQ, 0);

		/* Clear sleep sequence flag as wakeup sequence is successful */
		clear_bit(GMU_RSCC_SLEEP_SEQ_DONE, &gmu->flags);

		/* Enable the power counter because it was disabled before slumber */
		kgsl_gmu_regwrite(device, A6XX_GMU_CX_GMU_POWER_COUNTER_ENABLE, 1);

		@@ -1752,6 +1759,9 @@ static int a6xx_rpmh_power_off_gpu(struct kgsl_device *device)
		struct adreno_device *adreno_dev = ADRENO_DEVICE(device);
		int ret;

		if (test_bit(GMU_RSCC_SLEEP_SEQ_DONE, &gmu->flags))
		return 0;

		/* RSC sleep sequence is different on v1 */
		if (adreno_is_a630v1(adreno_dev))
		kgsl_gmu_regwrite(device, A6XX_RSCC_TIMESTAMP_UNIT1_EN_DRV0, 1);
		@@ -1793,6 +1803,7 @@ static int a6xx_rpmh_power_off_gpu(struct kgsl_device *device)
		test_bit(ADRENO_LM_CTRL, &adreno_dev->pwrctrl_flag))
		kgsl_gmu_regwrite(device, A6XX_GMU_AO_SPARE_CNTL, 0);

		set_bit(GMU_RSCC_SLEEP_SEQ_DONE, &gmu->flags);
		return 0;
		}

		@@ -1811,15 +1822,13 @@ static int a6xx_gmu_fw_start(struct kgsl_device *device,
		unsigned int chipid = 0;

		switch (boot_state) {
		case GMU_RESET:
		/* fall through */
		case GMU_COLD_BOOT:
		/* Turn on TCM retention */
		kgsl_gmu_regwrite(device, A6XX_GMU_GENERAL_7, 1);

		if (!test_and_set_bit(GMU_BOOT_INIT_DONE, &gmu->flags))
		_load_gmu_rpmh_ucode(device);
		else if (boot_state != GMU_RESET) {
		else {
		ret = a6xx_rpmh_power_on_gpu(device);
		if (ret)
		return ret;

drivers/gpu/msm/kgsl_gmu.c

+2 −2

Original line number	Diff line number	Diff line
		@@ -1461,7 +1461,7 @@ int gmu_start(struct kgsl_device *device)
		gmu_irq_enable(device);

		ret = gpudev->rpmh_gpu_pwrctrl(
		adreno_dev, GMU_FW_START, GMU_RESET, 0);
		adreno_dev, GMU_FW_START, GMU_COLD_BOOT, 0);
		if (ret)
		goto error_gmu;

		@@ -1478,7 +1478,7 @@ int gmu_start(struct kgsl_device *device)
		hfi_stop(gmu);

		ret = gpudev->rpmh_gpu_pwrctrl(adreno_dev, GMU_FW_START,
		GMU_RESET, 0);
		GMU_COLD_BOOT, 0);
		if (ret)
		goto error_gmu;

drivers/gpu/msm/kgsl_gmu.h

+2 −3

Original line number	Diff line number	Diff line
		@@ -102,6 +102,7 @@ enum gmu_flags {
		GMU_HFI_ON = 2,
		GMU_FAULT = 3,
		GMU_DCVS_REPLAY = 4,
		GMU_RSCC_SLEEP_SEQ_DONE = 5,
		};

		/**
		@@ -139,13 +140,11 @@ struct rpmh_votes_t {

		/*
		* These are the different ways the GMU can boot. GMU_WARM_BOOT is waking up
		* from slumber. GMU_COLD_BOOT is booting for the first time. GMU_RESET
		* is a soft reset of the GMU.
		* from slumber. GMU_COLD_BOOT is booting for the first time.
		*/
		enum gmu_boot {
		GMU_WARM_BOOT = 0,
		GMU_COLD_BOOT = 1,
		GMU_RESET = 2
		};

		enum gmu_load_mode {