Loading drivers/gpu/drm/msm/dsi-staging/dsi_catalog.c +2 −0 Original line number Diff line number Diff line Loading @@ -181,6 +181,8 @@ static void dsi_catalog_phy_3_0_init(struct dsi_phy_hw *phy) dsi_phy_hw_v3_0_ulps_exit; phy->ops.ulps_ops.get_lanes_in_ulps = dsi_phy_hw_v3_0_get_lanes_in_ulps; phy->ops.ulps_ops.is_lanes_in_ulps = dsi_phy_hw_v3_0_is_lanes_in_ulps; phy->ops.phy_timing_val = dsi_phy_hw_timing_val_v3_0; } Loading drivers/gpu/drm/msm/dsi-staging/dsi_catalog.h +1 −0 Original line number Diff line number Diff line Loading @@ -97,6 +97,7 @@ void dsi_phy_hw_v3_0_ulps_request(struct dsi_phy_hw *phy, void dsi_phy_hw_v3_0_ulps_exit(struct dsi_phy_hw *phy, struct dsi_phy_cfg *cfg, u32 lanes); u32 dsi_phy_hw_v3_0_get_lanes_in_ulps(struct dsi_phy_hw *phy); bool dsi_phy_hw_v3_0_is_lanes_in_ulps(u32 lanes, u32 ulps_lanes); int dsi_phy_hw_timing_val_v3_0(struct dsi_phy_per_lane_cfgs *timing_cfg, u32 *timing_val, u32 size); Loading drivers/gpu/drm/msm/dsi-staging/dsi_display.c +5 −4 Original line number Diff line number Diff line Loading @@ -260,7 +260,8 @@ static int dsi_display_set_ulps(struct dsi_display *display, bool enable) return rc; } rc = dsi_phy_set_ulps(m_ctrl->phy, &display->config, enable); rc = dsi_phy_set_ulps(m_ctrl->phy, &display->config, enable, display->clamp_enabled); if (rc) { pr_err("Ulps PHY state change(%d) failed\n", enable); return rc; Loading @@ -278,7 +279,8 @@ static int dsi_display_set_ulps(struct dsi_display *display, bool enable) return rc; } rc = dsi_phy_set_ulps(ctrl->phy, &display->config, enable); rc = dsi_phy_set_ulps(ctrl->phy, &display->config, enable, display->clamp_enabled); if (rc) { pr_err("Ulps PHY state change(%d) failed\n", enable); return rc; Loading Loading @@ -1365,8 +1367,7 @@ int dsi_pre_clkoff_cb(void *priv, /* * Enable DSI clamps only if entering idle power collapse. */ if (dsi_panel_initialized(display->panel) && dsi_panel_ulps_feature_enabled(display->panel)) { if (dsi_panel_initialized(display->panel)) { dsi_display_phy_idle_off(display); rc = dsi_display_set_clamp(display, true); if (rc) Loading drivers/gpu/drm/msm/dsi-staging/dsi_panel.c +2 −1 Original line number Diff line number Diff line Loading @@ -2490,7 +2490,6 @@ int dsi_panel_post_enable(struct dsi_panel *panel) panel->name, rc); goto error; } panel->panel_initialized = false; error: mutex_unlock(&panel->panel_lock); return rc; Loading Loading @@ -2536,6 +2535,8 @@ int dsi_panel_disable(struct dsi_panel *panel) panel->name, rc); goto error; } panel->panel_initialized = false; error: mutex_unlock(&panel->panel_lock); return rc; Loading drivers/gpu/drm/msm/dsi-staging/dsi_phy.c +29 −17 Original line number Diff line number Diff line Loading @@ -669,7 +669,7 @@ int dsi_phy_set_power_state(struct msm_dsi_phy *dsi_phy, bool enable) } static int dsi_phy_enable_ulps(struct msm_dsi_phy *phy, struct dsi_host_config *config) struct dsi_host_config *config, bool clamp_enabled) { int rc = 0; u32 lanes = 0; Loading @@ -679,17 +679,25 @@ static int dsi_phy_enable_ulps(struct msm_dsi_phy *phy, lanes = config->common_config.data_lanes; lanes |= DSI_CLOCK_LANE; /* * If DSI clamps are enabled, it means that the DSI lanes are * already in idle state. Checking for lanes to be in idle state * should be skipped during ULPS entry programming while coming * out of idle screen. */ if (!clamp_enabled) { rc = phy->hw.ops.ulps_ops.wait_for_lane_idle(&phy->hw, lanes); if (rc) { pr_err("lanes not entering idle, skip ULPS\n"); return rc; } } phy->hw.ops.ulps_ops.ulps_request(&phy->hw, &phy->cfg, lanes); ulps_lanes = phy->hw.ops.ulps_ops.get_lanes_in_ulps(&phy->hw); if ((lanes & ulps_lanes) != lanes) { if (!phy->hw.ops.ulps_ops.is_lanes_in_ulps(lanes, ulps_lanes)) { pr_err("Failed to enter ULPS, request=0x%x, actual=0x%x\n", lanes, ulps_lanes); rc = -EIO; Loading @@ -701,7 +709,6 @@ static int dsi_phy_enable_ulps(struct msm_dsi_phy *phy, static int dsi_phy_disable_ulps(struct msm_dsi_phy *phy, struct dsi_host_config *config) { int rc = 0; u32 ulps_lanes, lanes = 0; if (config->panel_mode == DSI_OP_CMD_MODE) Loading @@ -710,25 +717,27 @@ static int dsi_phy_disable_ulps(struct msm_dsi_phy *phy, ulps_lanes = phy->hw.ops.ulps_ops.get_lanes_in_ulps(&phy->hw); if ((lanes & ulps_lanes) != lanes) pr_err("Mismatch between lanes in ULPS\n"); lanes &= ulps_lanes; if (!phy->hw.ops.ulps_ops.is_lanes_in_ulps(lanes, ulps_lanes)) { pr_err("Mismatch in ULPS: lanes:%d, ulps_lanes:%d\n", lanes, ulps_lanes); return -EIO; } phy->hw.ops.ulps_ops.ulps_exit(&phy->hw, &phy->cfg, lanes); ulps_lanes = phy->hw.ops.ulps_ops.get_lanes_in_ulps(&phy->hw); if (ulps_lanes & lanes) { if (phy->hw.ops.ulps_ops.is_lanes_in_ulps(lanes, ulps_lanes)) { pr_err("Lanes (0x%x) stuck in ULPS\n", ulps_lanes); rc = -EIO; return -EIO; } return rc; return 0; } int dsi_phy_set_ulps(struct msm_dsi_phy *phy, struct dsi_host_config *config, bool enable) bool enable, bool clamp_enabled) { int rc = 0; Loading @@ -738,7 +747,10 @@ int dsi_phy_set_ulps(struct msm_dsi_phy *phy, struct dsi_host_config *config, } if (!phy->hw.ops.ulps_ops.ulps_request || !phy->hw.ops.ulps_ops.ulps_exit) { !phy->hw.ops.ulps_ops.ulps_exit || !phy->hw.ops.ulps_ops.get_lanes_in_ulps || !phy->hw.ops.ulps_ops.is_lanes_in_ulps || !phy->hw.ops.ulps_ops.wait_for_lane_idle) { pr_debug("DSI PHY ULPS ops not present\n"); return 0; } Loading @@ -746,7 +758,7 @@ int dsi_phy_set_ulps(struct msm_dsi_phy *phy, struct dsi_host_config *config, mutex_lock(&phy->phy_lock); if (enable) rc = dsi_phy_enable_ulps(phy, config); rc = dsi_phy_enable_ulps(phy, config, clamp_enabled); else rc = dsi_phy_disable_ulps(phy, config); Loading Loading
drivers/gpu/drm/msm/dsi-staging/dsi_catalog.c +2 −0 Original line number Diff line number Diff line Loading @@ -181,6 +181,8 @@ static void dsi_catalog_phy_3_0_init(struct dsi_phy_hw *phy) dsi_phy_hw_v3_0_ulps_exit; phy->ops.ulps_ops.get_lanes_in_ulps = dsi_phy_hw_v3_0_get_lanes_in_ulps; phy->ops.ulps_ops.is_lanes_in_ulps = dsi_phy_hw_v3_0_is_lanes_in_ulps; phy->ops.phy_timing_val = dsi_phy_hw_timing_val_v3_0; } Loading
drivers/gpu/drm/msm/dsi-staging/dsi_catalog.h +1 −0 Original line number Diff line number Diff line Loading @@ -97,6 +97,7 @@ void dsi_phy_hw_v3_0_ulps_request(struct dsi_phy_hw *phy, void dsi_phy_hw_v3_0_ulps_exit(struct dsi_phy_hw *phy, struct dsi_phy_cfg *cfg, u32 lanes); u32 dsi_phy_hw_v3_0_get_lanes_in_ulps(struct dsi_phy_hw *phy); bool dsi_phy_hw_v3_0_is_lanes_in_ulps(u32 lanes, u32 ulps_lanes); int dsi_phy_hw_timing_val_v3_0(struct dsi_phy_per_lane_cfgs *timing_cfg, u32 *timing_val, u32 size); Loading
drivers/gpu/drm/msm/dsi-staging/dsi_display.c +5 −4 Original line number Diff line number Diff line Loading @@ -260,7 +260,8 @@ static int dsi_display_set_ulps(struct dsi_display *display, bool enable) return rc; } rc = dsi_phy_set_ulps(m_ctrl->phy, &display->config, enable); rc = dsi_phy_set_ulps(m_ctrl->phy, &display->config, enable, display->clamp_enabled); if (rc) { pr_err("Ulps PHY state change(%d) failed\n", enable); return rc; Loading @@ -278,7 +279,8 @@ static int dsi_display_set_ulps(struct dsi_display *display, bool enable) return rc; } rc = dsi_phy_set_ulps(ctrl->phy, &display->config, enable); rc = dsi_phy_set_ulps(ctrl->phy, &display->config, enable, display->clamp_enabled); if (rc) { pr_err("Ulps PHY state change(%d) failed\n", enable); return rc; Loading Loading @@ -1365,8 +1367,7 @@ int dsi_pre_clkoff_cb(void *priv, /* * Enable DSI clamps only if entering idle power collapse. */ if (dsi_panel_initialized(display->panel) && dsi_panel_ulps_feature_enabled(display->panel)) { if (dsi_panel_initialized(display->panel)) { dsi_display_phy_idle_off(display); rc = dsi_display_set_clamp(display, true); if (rc) Loading
drivers/gpu/drm/msm/dsi-staging/dsi_panel.c +2 −1 Original line number Diff line number Diff line Loading @@ -2490,7 +2490,6 @@ int dsi_panel_post_enable(struct dsi_panel *panel) panel->name, rc); goto error; } panel->panel_initialized = false; error: mutex_unlock(&panel->panel_lock); return rc; Loading Loading @@ -2536,6 +2535,8 @@ int dsi_panel_disable(struct dsi_panel *panel) panel->name, rc); goto error; } panel->panel_initialized = false; error: mutex_unlock(&panel->panel_lock); return rc; Loading
drivers/gpu/drm/msm/dsi-staging/dsi_phy.c +29 −17 Original line number Diff line number Diff line Loading @@ -669,7 +669,7 @@ int dsi_phy_set_power_state(struct msm_dsi_phy *dsi_phy, bool enable) } static int dsi_phy_enable_ulps(struct msm_dsi_phy *phy, struct dsi_host_config *config) struct dsi_host_config *config, bool clamp_enabled) { int rc = 0; u32 lanes = 0; Loading @@ -679,17 +679,25 @@ static int dsi_phy_enable_ulps(struct msm_dsi_phy *phy, lanes = config->common_config.data_lanes; lanes |= DSI_CLOCK_LANE; /* * If DSI clamps are enabled, it means that the DSI lanes are * already in idle state. Checking for lanes to be in idle state * should be skipped during ULPS entry programming while coming * out of idle screen. */ if (!clamp_enabled) { rc = phy->hw.ops.ulps_ops.wait_for_lane_idle(&phy->hw, lanes); if (rc) { pr_err("lanes not entering idle, skip ULPS\n"); return rc; } } phy->hw.ops.ulps_ops.ulps_request(&phy->hw, &phy->cfg, lanes); ulps_lanes = phy->hw.ops.ulps_ops.get_lanes_in_ulps(&phy->hw); if ((lanes & ulps_lanes) != lanes) { if (!phy->hw.ops.ulps_ops.is_lanes_in_ulps(lanes, ulps_lanes)) { pr_err("Failed to enter ULPS, request=0x%x, actual=0x%x\n", lanes, ulps_lanes); rc = -EIO; Loading @@ -701,7 +709,6 @@ static int dsi_phy_enable_ulps(struct msm_dsi_phy *phy, static int dsi_phy_disable_ulps(struct msm_dsi_phy *phy, struct dsi_host_config *config) { int rc = 0; u32 ulps_lanes, lanes = 0; if (config->panel_mode == DSI_OP_CMD_MODE) Loading @@ -710,25 +717,27 @@ static int dsi_phy_disable_ulps(struct msm_dsi_phy *phy, ulps_lanes = phy->hw.ops.ulps_ops.get_lanes_in_ulps(&phy->hw); if ((lanes & ulps_lanes) != lanes) pr_err("Mismatch between lanes in ULPS\n"); lanes &= ulps_lanes; if (!phy->hw.ops.ulps_ops.is_lanes_in_ulps(lanes, ulps_lanes)) { pr_err("Mismatch in ULPS: lanes:%d, ulps_lanes:%d\n", lanes, ulps_lanes); return -EIO; } phy->hw.ops.ulps_ops.ulps_exit(&phy->hw, &phy->cfg, lanes); ulps_lanes = phy->hw.ops.ulps_ops.get_lanes_in_ulps(&phy->hw); if (ulps_lanes & lanes) { if (phy->hw.ops.ulps_ops.is_lanes_in_ulps(lanes, ulps_lanes)) { pr_err("Lanes (0x%x) stuck in ULPS\n", ulps_lanes); rc = -EIO; return -EIO; } return rc; return 0; } int dsi_phy_set_ulps(struct msm_dsi_phy *phy, struct dsi_host_config *config, bool enable) bool enable, bool clamp_enabled) { int rc = 0; Loading @@ -738,7 +747,10 @@ int dsi_phy_set_ulps(struct msm_dsi_phy *phy, struct dsi_host_config *config, } if (!phy->hw.ops.ulps_ops.ulps_request || !phy->hw.ops.ulps_ops.ulps_exit) { !phy->hw.ops.ulps_ops.ulps_exit || !phy->hw.ops.ulps_ops.get_lanes_in_ulps || !phy->hw.ops.ulps_ops.is_lanes_in_ulps || !phy->hw.ops.ulps_ops.wait_for_lane_idle) { pr_debug("DSI PHY ULPS ops not present\n"); return 0; } Loading @@ -746,7 +758,7 @@ int dsi_phy_set_ulps(struct msm_dsi_phy *phy, struct dsi_host_config *config, mutex_lock(&phy->phy_lock); if (enable) rc = dsi_phy_enable_ulps(phy, config); rc = dsi_phy_enable_ulps(phy, config, clamp_enabled); else rc = dsi_phy_disable_ulps(phy, config); Loading