Merge "drm/msm/sde: enable SDM845 V2 HW support" (b3244aae) · Commits · e / devices / android_kernel_fairphone_FP3

drivers/gpu/drm/msm/sde/sde_hw_catalog.c

+6 −14

Original line number	Original line	Diff line number	Diff line
	@@ -2944,33 +2944,25 @@ static int _sde_hardware_caps(struct sde_mdss_cfg *sde_cfg, uint32_t hw_rev)

	rc = sde_hardware_format_caps(sde_cfg, hw_rev);		rc = sde_hardware_format_caps(sde_cfg, hw_rev);

	switch (hw_rev) {		if (IS_MSM8996_TARGET(hw_rev)) {
	case SDE_HW_VER_170:
	case SDE_HW_VER_171:
	case SDE_HW_VER_172:
	/* update msm8996 target here */		/* update msm8996 target here */
	sde_cfg->perf.min_prefill_lines = 21;		sde_cfg->perf.min_prefill_lines = 21;
	break;		} else if (IS_MSM8998_TARGET(hw_rev)) {
	case SDE_HW_VER_300:
	case SDE_HW_VER_301:
	/* update msm8998 target here */		/* update msm8998 target here */
	sde_cfg->has_wb_ubwc = true;		sde_cfg->has_wb_ubwc = true;
	sde_cfg->perf.min_prefill_lines = 25;		sde_cfg->perf.min_prefill_lines = 25;
	sde_cfg->vbif_qos_nlvl = 4;		sde_cfg->vbif_qos_nlvl = 4;
	sde_cfg->ts_prefill_rev = 1;		sde_cfg->ts_prefill_rev = 1;
	sde_cfg->perf.min_prefill_lines = 25;		} else if (IS_SDM845_TARGET(hw_rev)) {
	break;
	case SDE_HW_VER_400:
	/* update sdm845 target here */		/* update sdm845 target here */
	sde_cfg->has_wb_ubwc = true;		sde_cfg->has_wb_ubwc = true;
	sde_cfg->perf.min_prefill_lines = 24;		sde_cfg->perf.min_prefill_lines = 24;
	sde_cfg->vbif_qos_nlvl = 8;		sde_cfg->vbif_qos_nlvl = 8;
	sde_cfg->ts_prefill_rev = 2;		sde_cfg->ts_prefill_rev = 2;
	sde_cfg->perf.min_prefill_lines = 24;		} else {
	break;		SDE_ERROR("unsupported chipset id:%X\n", hw_rev);
	default:
	sde_cfg->perf.min_prefill_lines = 0xffff;		sde_cfg->perf.min_prefill_lines = 0xffff;
	break;		rc = -ENODEV;
	}		}

	return rc;		return rc;

drivers/gpu/drm/msm/sde/sde_hw_catalog.h

+3 −0

Original line number	Original line	Diff line number	Diff line
	@@ -45,7 +45,10 @@
	#define SDE_HW_VER_300 SDE_HW_VER(3, 0, 0) /* 8998 v1.0 */		#define SDE_HW_VER_300 SDE_HW_VER(3, 0, 0) /* 8998 v1.0 */
	#define SDE_HW_VER_301 SDE_HW_VER(3, 0, 1) /* 8998 v1.1 */		#define SDE_HW_VER_301 SDE_HW_VER(3, 0, 1) /* 8998 v1.1 */
	#define SDE_HW_VER_400 SDE_HW_VER(4, 0, 0) /* sdm845 v1.0 */		#define SDE_HW_VER_400 SDE_HW_VER(4, 0, 0) /* sdm845 v1.0 */
			#define SDE_HW_VER_401 SDE_HW_VER(4, 0, 1) /* sdm845 v2.0 */

			#define IS_MSM8996_TARGET(rev) IS_SDE_MAJOR_MINOR_SAME((rev), SDE_HW_VER_170)
			#define IS_MSM8998_TARGET(rev) IS_SDE_MAJOR_MINOR_SAME((rev), SDE_HW_VER_300)
	#define IS_SDM845_TARGET(rev) IS_SDE_MAJOR_MINOR_SAME((rev), SDE_HW_VER_400)		#define IS_SDM845_TARGET(rev) IS_SDE_MAJOR_MINOR_SAME((rev), SDE_HW_VER_400)

	#define SDE_HW_BLK_NAME_LEN 16		#define SDE_HW_BLK_NAME_LEN 16

drivers/gpu/drm/msm/sde_dbg.c

+4 −10

Original line number	Original line	Diff line number	Diff line
	@@ -3067,9 +3067,7 @@ void sde_dbg_init_dbg_buses(u32 hwversion)
	memset(&dbg->dbgbus_sde, 0, sizeof(dbg->dbgbus_sde));		memset(&dbg->dbgbus_sde, 0, sizeof(dbg->dbgbus_sde));
	memset(&dbg->dbgbus_vbif_rt, 0, sizeof(dbg->dbgbus_vbif_rt));		memset(&dbg->dbgbus_vbif_rt, 0, sizeof(dbg->dbgbus_vbif_rt));

	switch (hwversion) {		if (IS_MSM8998_TARGET(hwversion)) {
	case SDE_HW_VER_300:
	case SDE_HW_VER_301:
	dbg->dbgbus_sde.entries = dbg_bus_sde_8998;		dbg->dbgbus_sde.entries = dbg_bus_sde_8998;
	dbg->dbgbus_sde.cmn.entries_size = ARRAY_SIZE(dbg_bus_sde_8998);		dbg->dbgbus_sde.cmn.entries_size = ARRAY_SIZE(dbg_bus_sde_8998);
	dbg->dbgbus_sde.cmn.flags = DBGBUS_FLAGS_DSPP;		dbg->dbgbus_sde.cmn.flags = DBGBUS_FLAGS_DSPP;
	@@ -3077,9 +3075,7 @@ void sde_dbg_init_dbg_buses(u32 hwversion)
	dbg->dbgbus_vbif_rt.entries = vbif_dbg_bus_msm8998;		dbg->dbgbus_vbif_rt.entries = vbif_dbg_bus_msm8998;
	dbg->dbgbus_vbif_rt.cmn.entries_size =		dbg->dbgbus_vbif_rt.cmn.entries_size =
	ARRAY_SIZE(vbif_dbg_bus_msm8998);		ARRAY_SIZE(vbif_dbg_bus_msm8998);
	break;		} else if (IS_SDM845_TARGET(hwversion)) {

	case SDE_HW_VER_400:
	dbg->dbgbus_sde.entries = dbg_bus_sde_sdm845;		dbg->dbgbus_sde.entries = dbg_bus_sde_sdm845;
	dbg->dbgbus_sde.cmn.entries_size =		dbg->dbgbus_sde.cmn.entries_size =
	ARRAY_SIZE(dbg_bus_sde_sdm845);		ARRAY_SIZE(dbg_bus_sde_sdm845);
	@@ -3089,10 +3085,8 @@ void sde_dbg_init_dbg_buses(u32 hwversion)
	dbg->dbgbus_vbif_rt.entries = vbif_dbg_bus_msm8998;		dbg->dbgbus_vbif_rt.entries = vbif_dbg_bus_msm8998;
	dbg->dbgbus_vbif_rt.cmn.entries_size =		dbg->dbgbus_vbif_rt.cmn.entries_size =
	ARRAY_SIZE(vbif_dbg_bus_msm8998);		ARRAY_SIZE(vbif_dbg_bus_msm8998);
	break;		} else {
	default:		pr_err("unsupported chipset id %X\n", hwversion);
	pr_err("unsupported chipset id %u\n", hwversion);
	break;
	}		}
	}		}