Loading arch/arm64/boot/dts/qcom/msm-arm-smmu-sdm845.dtsi +4 −8 Original line number Diff line number Diff line Loading @@ -34,14 +34,10 @@ <GIC_SPI 369 IRQ_TYPE_EDGE_RISING>, <GIC_SPI 370 IRQ_TYPE_EDGE_RISING>, <GIC_SPI 371 IRQ_TYPE_EDGE_RISING>; clock-names = "gcc_ddrss_gpu_axi_clk", "gcc_gpu_memnoc_gfx_clk", "gpu_cc_ahb_clk", "gpu_cc_cx_gmu_clk"; clocks = <&clock_gcc GCC_DDRSS_GPU_AXI_CLK>, <&clock_gcc GCC_GPU_MEMNOC_GFX_CLK>, <&clock_gpucc GPU_CC_AHB_CLK>, <&clock_gpucc GPU_CC_CX_GMU_CLK>; clock-names = "gcc_gpu_memnoc_gfx_clk", "gpu_cc_ahb_clk"; clocks = <&clock_gcc GCC_GPU_MEMNOC_GFX_CLK>, <&clock_gpucc GPU_CC_AHB_CLK>; attach-impl-defs = <0x6000 0x2378>, <0x6060 0x1055>, Loading drivers/iommu/arm-smmu.c +5 −0 Original line number Diff line number Diff line Loading @@ -3175,6 +3175,11 @@ static phys_addr_t qsmmuv2_iova_to_phys_hard(struct iommu_domain *domain, u32 sctlr, sctlr_orig, fsr; void __iomem *cb_base; if (smmu->model == QCOM_SMMUV2) { dev_err(smmu->dev, "ATOS support is disabled\n"); return 0; } ret = arm_smmu_power_on(smmu_domain->smmu->pwr); if (ret) return ret; Loading Loading
arch/arm64/boot/dts/qcom/msm-arm-smmu-sdm845.dtsi +4 −8 Original line number Diff line number Diff line Loading @@ -34,14 +34,10 @@ <GIC_SPI 369 IRQ_TYPE_EDGE_RISING>, <GIC_SPI 370 IRQ_TYPE_EDGE_RISING>, <GIC_SPI 371 IRQ_TYPE_EDGE_RISING>; clock-names = "gcc_ddrss_gpu_axi_clk", "gcc_gpu_memnoc_gfx_clk", "gpu_cc_ahb_clk", "gpu_cc_cx_gmu_clk"; clocks = <&clock_gcc GCC_DDRSS_GPU_AXI_CLK>, <&clock_gcc GCC_GPU_MEMNOC_GFX_CLK>, <&clock_gpucc GPU_CC_AHB_CLK>, <&clock_gpucc GPU_CC_CX_GMU_CLK>; clock-names = "gcc_gpu_memnoc_gfx_clk", "gpu_cc_ahb_clk"; clocks = <&clock_gcc GCC_GPU_MEMNOC_GFX_CLK>, <&clock_gpucc GPU_CC_AHB_CLK>; attach-impl-defs = <0x6000 0x2378>, <0x6060 0x1055>, Loading
drivers/iommu/arm-smmu.c +5 −0 Original line number Diff line number Diff line Loading @@ -3175,6 +3175,11 @@ static phys_addr_t qsmmuv2_iova_to_phys_hard(struct iommu_domain *domain, u32 sctlr, sctlr_orig, fsr; void __iomem *cb_base; if (smmu->model == QCOM_SMMUV2) { dev_err(smmu->dev, "ATOS support is disabled\n"); return 0; } ret = arm_smmu_power_on(smmu_domain->smmu->pwr); if (ret) return ret; Loading