drivers/edac: i5000 code tidying

static struct edac_pci_ctl_info *i5000_pci;

static struct edac_pci_ctl_info *i5000_pci;

/******************************************************************************

/*

 *	i5000_get_error_info	Retrieve the hardware error information from

 *	i5000_get_error_info	Retrieve the hardware error information from

 *				the hardware and cache it in the 'info'

 *				the hardware and cache it in the 'info'

 *				structure

 *				structure

	struct i5000_pvt *pvt;

	struct i5000_pvt *pvt;

	u32 value;

	u32 value;

	pvt = (struct i5000_pvt *)mci->pvt_info;

	pvt = mci->pvt_info;

	/* read in the 1st FATAL error register */

	/* read in the 1st FATAL error register */

	pci_read_config_dword(pvt->branchmap_werrors, FERR_FAT_FBD, &value);

	pci_read_config_dword(pvt->branchmap_werrors, FERR_FAT_FBD, &value);

	}

	}

}

}

/******************************************************************************

/*

 * i5000_process_fatal_error_info(struct mem_ctl_info *mci,

 * i5000_process_fatal_error_info(struct mem_ctl_info *mci,

 * 					struct i5000_error_info *info,

 * 					struct i5000_error_info *info,

 * 					int handle_errors);

 * 					int handle_errors);

	edac_mc_handle_fbd_ue(mci, rank, channel, channel + 1, msg);

	edac_mc_handle_fbd_ue(mci, rank, channel, channel + 1, msg);

}

}

/******************************************************************************

/*

 * i5000_process_fatal_error_info(struct mem_ctl_info *mci,

 * i5000_process_fatal_error_info(struct mem_ctl_info *mci,

 * 				struct i5000_error_info *info,

 * 				struct i5000_error_info *info,

 * 				int handle_errors);

 * 				int handle_errors);

	}

	}

}

}

/******************************************************************************

/*

 *	i5000_process_error_info	Process the error info that is

 *	i5000_process_error_info	Process the error info that is

 *	in the 'info' structure, previously retrieved from hardware

 *	in the 'info' structure, previously retrieved from hardware

 */

 */

	i5000_process_nonfatal_error_info(mci, info, handle_errors);

	i5000_process_nonfatal_error_info(mci, info, handle_errors);

}

}

/******************************************************************************

/*

 *	i5000_clear_error	Retrieve any error from the hardware

 *	i5000_clear_error	Retrieve any error from the hardware

 *				but do NOT process that error.

 *				but do NOT process that error.

 *				Used for 'clearing' out of previous errors

 *				Used for 'clearing' out of previous errors

	i5000_get_error_info(mci, &info);

	i5000_get_error_info(mci, &info);

}

}

/******************************************************************************

/*

 *	i5000_check_error	Retrieve and process errors reported by the

 *	i5000_check_error	Retrieve and process errors reported by the

 *				hardware. Called by the Core module.

 *				hardware. Called by the Core module.

 */

 */

	i5000_process_error_info(mci, &info, 1);

	i5000_process_error_info(mci, &info, 1);

}

}

/******************************************************************************

/*

 *	i5000_get_devices	Find and perform 'get' operation on the MCH's

 *	i5000_get_devices	Find and perform 'get' operation on the MCH's

 *			device/functions we want to reference for this driver

 *			device/functions we want to reference for this driver

 *

 *

	struct i5000_pvt *pvt;

	struct i5000_pvt *pvt;

	struct pci_dev *pdev;

	struct pci_dev *pdev;

	pvt = (struct i5000_pvt *)mci->pvt_info;

	pvt = mci->pvt_info;

	/* Attempt to 'get' the MCH register we want */

	/* Attempt to 'get' the MCH register we want */

	pdev = NULL;

	pdev = NULL;

	return 0;

	return 0;

}

}

/******************************************************************************

/*

 *	i5000_put_devices	'put' all the devices that we have

 *	i5000_put_devices	'put' all the devices that we have

 *				reserved via 'get'

 *				reserved via 'get'

 */

 */

{

{

	struct i5000_pvt *pvt;

	struct i5000_pvt *pvt;

	pvt = (struct i5000_pvt *)mci->pvt_info;

	pvt = mci->pvt_info;

	pci_dev_put(pvt->branchmap_werrors);	/* FUNC 1 */

	pci_dev_put(pvt->branchmap_werrors);	/* FUNC 1 */

	pci_dev_put(pvt->fsb_error_regs);	/* FUNC 2 */

	pci_dev_put(pvt->fsb_error_regs);	/* FUNC 2 */

	pci_dev_put(pvt->branch_0);	/* DEV 21 */

	pci_dev_put(pvt->branch_0);	/* DEV 21 */

	/* Only if more than 2 channels do we release the second branch */

	/* Only if more than 2 channels do we release the second branch */

	if (pvt->maxch >= CHANNELS_PER_BRANCH) {

	if (pvt->maxch >= CHANNELS_PER_BRANCH)

		pci_dev_put(pvt->branch_1);	/* DEV 22 */

		pci_dev_put(pvt->branch_1);	/* DEV 22 */

}

}

}

/******************************************************************************

/*

 *	determine_amb_resent

 *	determine_amb_resent

 *

 *

 *		the information is contained in NUM_MTRS different registers

 *		the information is contained in NUM_MTRS different registers

	return amb_present;

	return amb_present;

}

}

/******************************************************************************

/*

 * determine_mtr(pvt, csrow, channel)

 * determine_mtr(pvt, csrow, channel)

 *

 *

 *	return the proper MTR register as determine by the csrow and channel desired

 *	return the proper MTR register as determine by the csrow and channel desired

	return mtr;

	return mtr;

}

}

/******************************************************************************

/*

 */

 */

static void decode_mtr(int slot_row, u16 mtr)

static void decode_mtr(int slot_row, u16 mtr)

{

{

	}

	}

}

}

/******************************************************************************

/*

 *	calculate_dimm_size

 *	calculate_dimm_size

 *

 *

 *	also will output a DIMM matrix map, if debug is enabled, for viewing

 *	also will output a DIMM matrix map, if debug is enabled, for viewing

	kfree(mem_buffer);

	kfree(mem_buffer);

}

}

/******************************************************************************

/*

 *	i5000_get_mc_regs	read in the necessary registers and

 *	i5000_get_mc_regs	read in the necessary registers and

 *				cache locally

 *				cache locally

 *

 *

	int maxdimmperch;

	int maxdimmperch;

	int way0, way1;

	int way0, way1;

	pvt = (struct i5000_pvt *)mci->pvt_info;

	pvt = mci->pvt_info;

	pci_read_config_dword(pvt->system_address, AMBASE,

	pci_read_config_dword(pvt->system_address, AMBASE,

			(u32 *) & pvt->ambase);

			(u32 *) & pvt->ambase);

	calculate_dimm_size(pvt);

	calculate_dimm_size(pvt);

}

}

/******************************************************************************

/*

 *	i5000_init_csrows	Initialize the 'csrows' table within

 *	i5000_init_csrows	Initialize the 'csrows' table within

 *				the mci control	structure with the

 *				the mci control	structure with the

 *				addressing of memory.

 *				addressing of memory.

	int channel;

	int channel;

	int csrow;

	int csrow;

	pvt = (struct i5000_pvt *)mci->pvt_info;

	pvt = mci->pvt_info;

	channel_count = pvt->maxch;

	channel_count = pvt->maxch;

	max_csrows = pvt->maxdimmperch * 2;

	max_csrows = pvt->maxdimmperch * 2;

	return empty;

	return empty;

}

}

/******************************************************************************

/*

 *	i5000_enable_error_reporting

 *	i5000_enable_error_reporting

 *			Turn on the memory reporting features of the hardware

 *			Turn on the memory reporting features of the hardware

 */

 */

	struct i5000_pvt *pvt;

	struct i5000_pvt *pvt;

	u32 fbd_error_mask;

	u32 fbd_error_mask;

	pvt = (struct i5000_pvt *)mci->pvt_info;

	pvt = mci->pvt_info;

	/* Read the FBD Error Mask Register */

	/* Read the FBD Error Mask Register */

	pci_read_config_dword(pvt->branchmap_werrors, EMASK_FBD,

	pci_read_config_dword(pvt->branchmap_werrors, EMASK_FBD,

			fbd_error_mask);

			fbd_error_mask);

}

}

/******************************************************************************

/*

 * i5000_get_dimm_and_channel_counts(pdev, &num_csrows, &num_channels)

 * i5000_get_dimm_and_channel_counts(pdev, &num_csrows, &num_channels)

 *

 *

 *	ask the device how many channels are present and how many CSROWS

 *	ask the device how many channels are present and how many CSROWS

	*num_channels = (int)value;

	*num_channels = (int)value;

}

}

/******************************************************************************

/*

 *	i5000_probe1	Probe for ONE instance of device to see if it is

 *	i5000_probe1	Probe for ONE instance of device to see if it is

 *			present.

 *			present.

 *	return:

 *	return:

	mci->dev = &pdev->dev;	/* record ptr  to the generic device */

	mci->dev = &pdev->dev;	/* record ptr  to the generic device */

	pvt = (struct i5000_pvt *)mci->pvt_info;

	pvt = mci->pvt_info;

	pvt->system_address = pdev;	/* Record this device in our private */

	pvt->system_address = pdev;	/* Record this device in our private */

	pvt->maxch = num_channels;

	pvt->maxch = num_channels;

	pvt->maxdimmperch = num_dimms_per_channel;

	pvt->maxdimmperch = num_dimms_per_channel;

	return -ENODEV;

	return -ENODEV;

}

}

/******************************************************************************

/*

 *	i5000_init_one	constructor for one instance of device

 *	i5000_init_one	constructor for one instance of device

 *

 *

 * 	returns:

 * 	returns:

	return i5000_probe1(pdev, id->driver_data);

	return i5000_probe1(pdev, id->driver_data);

}

}

/**************************************************************************

/*

 *	i5000_remove_one	destructor for one instance of device

 *	i5000_remove_one	destructor for one instance of device

 *

 *

 */

 */

	edac_mc_free(mci);

	edac_mc_free(mci);

}

}

/**************************************************************************

/*

 *	pci_device_id	table for which devices we are looking for

 *	pci_device_id	table for which devices we are looking for

 *

 *

 *	The "E500P" device is the first device supported.

 *	The "E500P" device is the first device supported.

MODULE_DEVICE_TABLE(pci, i5000_pci_tbl);

MODULE_DEVICE_TABLE(pci, i5000_pci_tbl);

/**************************************************************************

/*

 *	i5000_driver	pci_driver structure for this module

 *	i5000_driver	pci_driver structure for this module

 *

 *

 */

 */

	.id_table = i5000_pci_tbl,

	.id_table = i5000_pci_tbl,

};

};

/**************************************************************************

/*

 *	i5000_init		Module entry function

 *	i5000_init		Module entry function

 *			Try to initialize this module for its devices

 *			Try to initialize this module for its devices

 */

 */

	return (pci_rc < 0) ? pci_rc : 0;

	return (pci_rc < 0) ? pci_rc : 0;

}

}

/**************************************************************************

/*

 *	i5000_exit()	Module exit function

 *	i5000_exit()	Module exit function

 *			Unregister the driver

 *			Unregister the driver

 */

 */