Loading arch/arm64/boot/dts/qcom/sdm845.dtsi +8 −0 Original line number Diff line number Diff line Loading @@ -18,6 +18,7 @@ #include <dt-bindings/clock/qcom,videocc-sdm845.h> #include <dt-bindings/clock/qcom,cpucc-sdm845.h> #include <dt-bindings/clock/qcom,rpmh.h> #include <dt-bindings/clock/qcom,aop-qmp.h> #include <dt-bindings/regulator/qcom,rpmh-regulator.h> #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/soc/qcom,tcs-mbox.h> Loading Loading @@ -1011,6 +1012,13 @@ #clock-cells = <1>; }; clock_aop: qcom,aopclk { compatible = "qcom,aop-qmp-clk"; #clock-cells = <1>; mboxes = <&qmp_aop 0>; mbox-names = "qdss_clk"; }; ufsphy_mem: ufsphy_mem@1d87000 { reg = <0x1d87000 0xda8>; /* PHY regs */ reg-names = "phy_mem"; Loading Loading
arch/arm64/boot/dts/qcom/sdm845.dtsi +8 −0 Original line number Diff line number Diff line Loading @@ -18,6 +18,7 @@ #include <dt-bindings/clock/qcom,videocc-sdm845.h> #include <dt-bindings/clock/qcom,cpucc-sdm845.h> #include <dt-bindings/clock/qcom,rpmh.h> #include <dt-bindings/clock/qcom,aop-qmp.h> #include <dt-bindings/regulator/qcom,rpmh-regulator.h> #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/soc/qcom,tcs-mbox.h> Loading Loading @@ -1011,6 +1012,13 @@ #clock-cells = <1>; }; clock_aop: qcom,aopclk { compatible = "qcom,aop-qmp-clk"; #clock-cells = <1>; mboxes = <&qmp_aop 0>; mbox-names = "qdss_clk"; }; ufsphy_mem: ufsphy_mem@1d87000 { reg = <0x1d87000 0xda8>; /* PHY regs */ reg-names = "phy_mem"; Loading