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Commit b1be6c6a authored by Jayachandran Sreekumaran's avatar Jayachandran Sreekumaran
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cnss2: cnss api update for genoa pcie 



cnss api update for genoa pcie to pass the memory information for
read index update.

Change-Id: Iac8c7addf77b5782b1b4347f448633b88f54b6e2
Signed-off-by: default avatarJayachandran Sreekumaran <jsreekum@codeaurora.org>
parent 88aabc45

include/net/cnss2.h

+7 −0
Original line number Diff line number Diff line
@@ -115,6 +115,11 @@ struct cnss_shadow_reg_v2_cfg { 
	u32 addr;

};



struct cnss_rri_over_ddr_cfg {

	u32 base_addr_low;

	u32 base_addr_high;

};



struct cnss_wlan_enable_cfg {

	u32 num_ce_tgt_cfg;

	struct cnss_ce_tgt_pipe_cfg *ce_tgt_cfg;
@@ -124,6 +129,8 @@ struct cnss_wlan_enable_cfg { 
	struct cnss_shadow_reg_cfg *shadow_reg_cfg;

	u32 num_shadow_reg_v2_cfg;

	struct cnss_shadow_reg_v2_cfg *shadow_reg_v2_cfg;

	bool rri_over_ddr_cfg_valid;

	struct cnss_rri_over_ddr_cfg rri_over_ddr_cfg;

};



enum cnss_driver_mode {