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Commit b150ff0f authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
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Merge "UPSTREAM: Merge remote-tracking branch 'quic/dev/msm-4.9-camx' into msm-4.9"

parents 9ee61dd5 209e2a32

Documentation/devicetree/bindings/media/video/msm-cam-jpeg.txt

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* Qualcomm Technologies, Inc. MSM Camera JPEG



The MSM camera JPEG devices are implemented multiple device nodes.

The root JPEG device node has properties defined to hint the driver

about the number of Encoder and DMA nodes available during the

probe sequence. Each node has multiple properties defined

for interrupts, clocks and regulators.



=======================

Required Node Structure

=======================

JPEG root interface node takes care of the handling account for number

of Encoder and DMA devices present on the hardware.



- compatible

  Usage: required

  Value type: <string>

  Definition: Should be "qcom,cam-jpeg".



- compat-hw-name

  Usage: required

  Value type: <string>

  Definition: Should be "qcom,jpegenc" or "qcom,jpegdma".



- num-jpeg-enc

  Usage: required

  Value type: <u32>

  Definition: Number of supported Encoder HW blocks.



- num-jpeg-dma

  Usage: required

  Value type: <u32>

  Definition: Number of supported DMA HW blocks.



Example:

	qcom,cam-jpeg {

		compatible = "qcom,cam-jpeg";

		compat-hw-name = "qcom,jpegenc",

			"qcom,jpegdma";

		num-jpeg-enc = <1>;

		num-jpeg-dma = <1>;

		status = "ok";

	};





=======================

Required Node Structure

=======================

Encoder/DMA Nodes provide interface for JPEG driver about

the device register map, interrupt map, clocks and regulators.



- cell-index

  Usage: required

  Value type: <u32>

  Definition: Node instance number.



- compatible

  Usage: required

  Value type: <string>

  Definition: Should be "qcom,cam_jpeg_enc".



- reg-names

  Usage: optional

  Value type: <string>

  Definition: Name of the register resources.



- reg

  Usage: optional

  Value type: <u32>

  Definition: Register values.



- reg-cam-base

  Usage: optional

  Value type: <u32>

  Definition: Offset of the register space compared to

              to Camera base register space.



- interrupt-names

  Usage: optional

  Value type: <string>

  Definition: Name of the interrupt.



- interrupts

  Usage: optional

  Value type: <u32>

  Definition: Interrupt associated with JPEG HW.



- regulator-names

  Usage: required

  Value type: <string>

  Definition: Name of the regulator resources for JPEG HW.



- camss-vdd-supply

  Usage: required

  Value type: <phandle>

  Definition: Regulator reference corresponding to the names listed

              in "regulator-names".



- clock-names

  Usage: required

  Value type: <string>

  Definition: List of clock names required for JPEG HW.



- clocks

  Usage: required

  Value type: <phandle>

  Definition: List of clocks used for JPEG HW.



- clock-rates

  Usage: required

  Value type: <u32>

  Definition: List of clocks rates.



- src-clock-name

  Usage: required

  Value type: <string>

  Definition: Source clock name.



- clock-cntl-level

  Usage: required

  Value type: <string>

  Definition: List of strings corresponds clock-rates levels.

  Supported strings: minsvs, lowsvs, svs, svs_l1, nominal, turbo.



Examples:

	cam_jpeg_enc: qcom,jpegenc@ac4e000 {

		cell-index = <0>;

		compatible = "qcom,cam_jpeg_enc";

		reg-names = "jpege_hw";

		reg = <0xac4e000 0x4000>;

		reg-cam-base = <0x4e000>;

		interrupt-names = "jpeg";

		interrupts = <0 474 0>;

		regulator-names = "camss-vdd";

		camss-vdd-supply = <&titan_top_gdsc>;

		clock-names = "camera_ahb",

			"camera_axi",

			"soc_ahb_clk",

			"cpas_ahb_clk",

			"camnoc_axi_clk",

			"jpegenc_clk_src",

			"jpegenc_clk";

		clocks = <&clock_gcc GCC_CAMERA_AHB_CLK>,

			<&clock_gcc GCC_CAMERA_AXI_CLK>,

			<&clock_camcc CAM_CC_SOC_AHB_CLK>,

			<&clock_camcc CAM_CC_CPAS_AHB_CLK>,

			<&clock_camcc CAM_CC_CAMNOC_AXI_CLK>,

			<&clock_camcc CAM_CC_JPEG_CLK_SRC>,

			<&clock_camcc CAM_CC_JPEG_CLK>;



		clock-rates = <0 0 0 0 0 600000000 0>;

		src-clock-name = "jpegenc_clk_src";

		clock-cntl-level = "nominal";

		status = "ok";

	};



	cam_jpeg_dma: qcom,jpegdma@0xac52000{

		cell-index = <0>;

		compatible = "qcom,cam_jpeg_dma";

		reg-names = "jpegdma_hw";

		reg = <0xac52000 0x4000>;

		reg-cam-base = <0x52000>;

		interrupt-names = "jpegdma";

		interrupts = <0 475 0>;

		regulator-names = "camss-vdd";

		camss-vdd-supply = <&titan_top_gdsc>;

		clock-names = "camera_ahb",

			"camera_axi",

			"soc_ahb_clk",

			"cpas_ahb_clk",

			"camnoc_axi_clk",

			"jpegdma_clk_src",

			"jpegdma_clk";

		clocks = <&clock_gcc GCC_CAMERA_AHB_CLK>,

			<&clock_gcc GCC_CAMERA_AXI_CLK>,

			<&clock_camcc CAM_CC_SOC_AHB_CLK>,

			<&clock_camcc CAM_CC_CPAS_AHB_CLK>,

			<&clock_camcc CAM_CC_CAMNOC_AXI_CLK>,

			<&clock_camcc CAM_CC_JPEG_CLK_SRC>,

			<&clock_camcc CAM_CC_JPEG_CLK>;



		clock-rates = <0 0 0 0 0 600000000 0>;

		src-clock-name = "jpegdma_clk_src";

		clock-cntl-level = "nominal";

		status = "ok";

	};

arch/arm64/boot/dts/qcom/sdm845-camera.dtsi

+92 −3
Original line number Diff line number Diff line
@@ -246,6 +246,23 @@ 
			};

		};



		msm_cam_smmu_jpeg {

			compatible = "qcom,msm-cam-smmu-cb";

			iommus = <&apps_smmu 0x1060 0x8>,

				<&apps_smmu 0x1068 0x8>;

			label = "jpeg";

			jpeg_iova_mem_map: iova-mem-map {

				/* IO region is approximately 3.4 GB */

				iova-mem-region-io {

					iova-region-name = "io";

					iova-region-start = <0x7400000>;

					iova-region-len = <0xd8c00000>;

					iova-region-id = <0x3>;

					status = "ok";

				};

			};

		};



		msm_cam_icp_fw {

			compatible = "qcom,msm-cam-smmu-fw-dev";

			label="icp";
@@ -398,7 +415,7 @@ 
			"csid0", "csid1", "csid2",

			"ife0", "ife1", "ife2", "ipe0",

			"ipe1", "cam-cdm-intf0", "cpas-cdm0", "bps0",

			"icp0", "jpeg-dma0", "jpeg0", "fd0";

			"icp0", "jpeg-dma0", "jpeg-enc0", "fd0";

		client-axi-port-names =

			"cam_hf_1", "cam_hf_2", "cam_hf_2", "cam_sf_1",

			"cam_hf_1", "cam_hf_2", "cam_hf_2",
@@ -491,8 +508,8 @@ 
		label = "cam-cdm-intf";

		num-hw-cdm = <1>;

		cdm-client-names = "vfe",

			"jpeg-dma",

			"jpeg",

			"jpegdma",

			"jpegenc",

			"fd";

		status = "ok";

	};
@@ -875,4 +892,76 @@ 
		clock-cntl-level = "turbo";

		status = "ok";

	};



	qcom,cam-jpeg {

		compatible = "qcom,cam-jpeg";

		compat-hw-name = "qcom,jpegenc",

			"qcom,jpegdma";

		num-jpeg-enc = <1>;

		num-jpeg-dma = <1>;

		status = "ok";

	};



	cam_jpeg_enc: qcom,jpegenc@ac4e000 {

		cell-index = <0>;

		compatible = "qcom,cam_jpeg_enc";

		reg-names = "jpege_hw";

		reg = <0xac4e000 0x4000>;

		reg-cam-base = <0x4e000>;

		interrupt-names = "jpeg";

		interrupts = <0 474 0>;

		regulator-names = "camss-vdd";

		camss-vdd-supply = <&titan_top_gdsc>;

		clock-names = "camera_ahb",

			"camera_axi",

			"soc_ahb_clk",

			"cpas_ahb_clk",

			"camnoc_axi_clk",

			"jpegenc_clk_src",

			"jpegenc_clk";

		clocks = <&clock_gcc GCC_CAMERA_AHB_CLK>,

			<&clock_gcc GCC_CAMERA_AXI_CLK>,

			<&clock_camcc CAM_CC_SOC_AHB_CLK>,

			<&clock_camcc CAM_CC_CPAS_AHB_CLK>,

			<&clock_camcc CAM_CC_CAMNOC_AXI_CLK>,

			<&clock_camcc CAM_CC_JPEG_CLK_SRC>,

			<&clock_camcc CAM_CC_JPEG_CLK>;



		clock-rates = <0 0 0 0 0 600000000 0>;

		src-clock-name = "jpegenc_clk_src";

		clock-cntl-level = "nominal";

		status = "ok";

	};



	cam_jpeg_dma: qcom,jpegdma@0xac52000{

		cell-index = <0>;

		compatible = "qcom,cam_jpeg_dma";

		reg-names = "jpegdma_hw";

		reg = <0xac52000 0x4000>;

		reg-cam-base = <0x52000>;

		interrupt-names = "jpegdma";

		interrupts = <0 475 0>;

		regulator-names = "camss-vdd";

		camss-vdd-supply = <&titan_top_gdsc>;

		clock-names = "camera_ahb",

			"camera_axi",

			"soc_ahb_clk",

			"cpas_ahb_clk",

			"camnoc_axi_clk",

			"jpegdma_clk_src",

			"jpegdma_clk";

		clocks = <&clock_gcc GCC_CAMERA_AHB_CLK>,

			<&clock_gcc GCC_CAMERA_AXI_CLK>,

			<&clock_camcc CAM_CC_SOC_AHB_CLK>,

			<&clock_camcc CAM_CC_CPAS_AHB_CLK>,

			<&clock_camcc CAM_CC_CAMNOC_AXI_CLK>,

			<&clock_camcc CAM_CC_JPEG_CLK_SRC>,

			<&clock_camcc CAM_CC_JPEG_CLK>;



		clock-rates = <0 0 0 0 0 600000000 0>;

		src-clock-name = "jpegdma_clk_src";

		clock-cntl-level = "nominal";

		status = "ok";

	};



};

drivers/media/platform/msm/camera/Makefile

+1 −0
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@@ -8,3 +8,4 @@ obj-$(CONFIG_SPECTRA_CAMERA) += cam_cdm/ 
obj-$(CONFIG_SPECTRA_CAMERA) += cam_isp/

obj-$(CONFIG_SPECTRA_CAMERA) += cam_sensor_module/

obj-$(CONFIG_SPECTRA_CAMERA) += cam_icp/

obj-$(CONFIG_SPECTRA_CAMERA) += cam_jpeg/

drivers/media/platform/msm/camera/cam_cdm/cam_cdm.h

+1 −1
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@@ -32,7 +32,7 @@ 
#define CAM_MAX_SW_CDM_VERSION_SUPPORTED  1

#define CAM_SW_CDM_INDEX                  0

#define CAM_CDM_INFLIGHT_WORKS            5

#define CAM_CDM_HW_RESET_TIMEOUT          3000

#define CAM_CDM_HW_RESET_TIMEOUT          300



#define CAM_CDM_HW_ID_MASK      0xF

#define CAM_CDM_HW_ID_SHIFT     0x5

drivers/media/platform/msm/camera/cam_cdm/cam_cdm_util.c

+1 −1
Original line number Diff line number Diff line
@@ -243,7 +243,7 @@ uint32_t *cdm_write_regrandom(uint32_t *pCmdBuffer, uint32_t numRegVals, 
		*dst++ = *src++;

	}



	return pCmdBuffer;

	return dst;

}



uint32_t *cdm_write_dmi(uint32_t *pCmdBuffer, uint8_t dmiCmd,