Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit b0f96900 authored by John Stultz's avatar John Stultz
Browse files

Merge remote branch 'tip/x86/tsc' into fortglx/2.6.38/tip/x86/tsc

Conflicts:
	Documentation/kernel-parameters.txt
parents 3561d43f d3b8f889
Loading
Loading
Loading
Loading
+5 −4
Original line number Diff line number Diff line
@@ -2467,12 +2467,13 @@ and is between 256 and 4096 characters. It is defined in the file
			to facilitate early boot debugging.
			See also Documentation/trace/events.txt

	tsc=		Disable clocksource-must-verify flag for TSC.
	tsc=		Disable clocksource stability checks for TSC.
			Format: <string>
			[x86] reliable: mark tsc clocksource as reliable, this
			disables clocksource verification at runtime.
			Used to enable high-resolution timer mode on older
			hardware, and in virtualized environment.
			disables clocksource verification at runtime, as well
			as the stability checks done at bootup.	Used to enable
			high-resolution timer mode on older hardware, and in
			virtualized environment.
			[x86] noirqtime: Do not use TSC to do irq accounting.
			Used to run time disable IRQ_TIME_ACCOUNTING on any
			platforms where RDTSC is slow and this accounting
+5 −2
Original line number Diff line number Diff line
@@ -872,6 +872,9 @@ __cpuinit int unsynchronized_tsc(void)

	if (boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
		return 0;

	if (tsc_clocksource_reliable)
		return 0;
	/*
	 * Intel systems are normally all synchronized.
	 * Exceptions must mark TSC as unstable:
@@ -879,10 +882,10 @@ __cpuinit int unsynchronized_tsc(void)
	if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL) {
		/* assume multi socket systems are not synchronized: */
		if (num_possible_cpus() > 1)
			tsc_unstable = 1;
			return 1;
	}

	return tsc_unstable;
	return 0;
}

static void __init init_tsc_clocksource(void)