Commit af7f032d authored Dec 19, 2012 by Soren Brinkmann Committed by Michal Simek Jan 28, 2013

arm: zynq: timer: Remove unnecessary register write



Acknowedging an interrupt requires to read the interrupt register
only. The write was only required to work around a bug in
the QEMU implementation of the TTC, which is fixed.

Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com>
Acked-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Tested-by: Josh Cartwright <josh.cartwright@ni.com>

parent f184c5ca

arch/arm/mach-zynq/timer.c

+1 −2

Original line number	Diff line number	Diff line
		@@ -121,8 +121,7 @@ static irqreturn_t xttcps_clock_event_interrupt(int irq, void *dev_id)
		struct xttcps_timer *timer = &xttce->xttc;

		/* Acknowledge the interrupt and call event handler */
		__raw_writel(__raw_readl(timer->base_addr + XTTCPS_ISR_OFFSET),
		timer->base_addr + XTTCPS_ISR_OFFSET);
		__raw_readl(timer->base_addr + XTTCPS_ISR_OFFSET);

		xttce->ce.event_handler(&xttce->ce);