Commit af73110d authored May 18, 2009 by Catalin Marinas Committed by Russell King May 28, 2009

[ARM] 5516/1: Flush the D-cache after initialising the SCU



On MP systems, the data loaded by CPU0 before the SCU was initialised
may not be visible to the other CPUs.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

This also includes the following compile fix:

This patch includes 'asm/cacheflush.h' which is needed to use
'flush_cache_all()' function.

Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

parent 4c5158d4

arch/arm/kernel/smp_scu.c

+7 −0

Original line number	Diff line number	Diff line
		@@ -12,6 +12,7 @@
		#include <linux/io.h>

		#include <asm/smp_scu.h>
		#include <asm/cacheflush.h>

		#define SCU_CTRL 0x00
		#define SCU_CONFIG 0x04
		@@ -38,4 +39,10 @@ void __init scu_enable(void __iomem *scu_base)
		scu_ctrl = __raw_readl(scu_base + SCU_CTRL);
		scu_ctrl \|= 1;
		__raw_writel(scu_ctrl, scu_base + SCU_CTRL);

		/*
		* Ensure that the data accessed by CPU0 before the SCU was
		* initialised is visible to the other CPUs.
		*/
		flush_cache_all();
		}