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Commit af5f2bc1 authored by Girish Mahadevan's avatar Girish Mahadevan
Browse files

platform: msm: qcom-geni-se: Modify GSI switch sequence 



Modify the function call that switches to GSI DMA mode to keep the error
and GP (general purpose) IRQ bits enabled but only disables the datapath
related IRQ bits.

Change-Id: Ib88e11f0eeabcb62dbd88f37a5d468a36930b1a4
Signed-off-by: default avatarGirish Mahadevan <girishm@codeaurora.org>
parent 673a4508

drivers/i2c/busses/i2c-qcom-geni.c

+2 −1
Original line number Diff line number Diff line
@@ -904,7 +904,8 @@ static int geni_i2c_runtime_resume(struct device *dev) 
		return ret;



	if (gi2c->se_mode == UNINITIALIZED) {

		u32 se_mode = readl_relaxed(gi2c->base + GENI_IF_DISABLE_RO);

		u32 se_mode = readl_relaxed(gi2c->base +

					GENI_IF_FIFO_DISABLE_RO);



		if (se_mode) {

			gi2c->se_mode = GSI_ONLY;

drivers/platform/msm/qcom-geni-se.c

+15 −4
Original line number Diff line number Diff line
@@ -293,20 +293,31 @@ static int geni_se_select_dma_mode(void __iomem *base) 


static int geni_se_select_gsi_mode(void __iomem *base)

{

	unsigned int io_mode = 0;

	unsigned int geni_dma_mode = 0;

	unsigned int gsi_event_en = 0;

	unsigned int common_geni_m_irq_en = 0;

	unsigned int common_geni_s_irq_en = 0;



	common_geni_m_irq_en = geni_read_reg(base, SE_GENI_M_IRQ_EN);

	common_geni_s_irq_en = geni_read_reg(base, SE_GENI_S_IRQ_EN);

	common_geni_m_irq_en &=

			~(M_CMD_DONE_EN | M_TX_FIFO_WATERMARK_EN |

			M_RX_FIFO_WATERMARK_EN | M_RX_FIFO_LAST_EN);

	common_geni_s_irq_en &= ~S_CMD_DONE_EN;

	geni_dma_mode = geni_read_reg(base, SE_GENI_DMA_MODE_EN);

	gsi_event_en = geni_read_reg(base, SE_GSI_EVENT_EN);

	io_mode = geni_read_reg(base, SE_IRQ_EN);



	geni_dma_mode |= GENI_DMA_MODE_EN;

	io_mode &= ~(DMA_TX_IRQ_EN | DMA_RX_IRQ_EN);

	gsi_event_en |= (DMA_RX_EVENT_EN | DMA_TX_EVENT_EN |

				GENI_M_EVENT_EN | GENI_S_EVENT_EN);



	geni_write_reg(io_mode, base, SE_IRQ_EN);

	geni_write_reg(0, base, SE_IRQ_EN);

	geni_write_reg(common_geni_s_irq_en, base, SE_GENI_S_IRQ_EN);

	geni_write_reg(common_geni_m_irq_en, base, SE_GENI_M_IRQ_EN);

	geni_write_reg(0xFFFFFFFF, base, SE_GENI_M_IRQ_CLEAR);

	geni_write_reg(0xFFFFFFFF, base, SE_GENI_S_IRQ_CLEAR);

	geni_write_reg(0xFFFFFFFF, base, SE_DMA_TX_IRQ_CLR);

	geni_write_reg(0xFFFFFFFF, base, SE_DMA_RX_IRQ_CLR);

	geni_write_reg(geni_dma_mode, base, SE_GENI_DMA_MODE_EN);

	geni_write_reg(gsi_event_en, base, SE_GSI_EVENT_EN);

	return 0;

include/linux/qcom-geni-se.h

+9 −2
Original line number Diff line number Diff line
@@ -82,7 +82,7 @@ struct se_geni_rsc { 
#define GENI_SER_M_CLK_CFG		(0x48)

#define GENI_SER_S_CLK_CFG		(0x4C)

#define GENI_CLK_CTRL_RO		(0x60)

#define GENI_IF_DISABLE_RO		(0x64)

#define GENI_IF_FIFO_DISABLE_RO		(0x64)

#define GENI_FW_REVISION_RO		(0x68)

#define GENI_FW_S_REVISION_RO		(0x6C)

#define SE_GENI_CLK_SEL			(0x7C)
@@ -147,7 +147,8 @@ struct se_geni_rsc { 


/* CLK_CTRL_RO fields */



/* IF_DISABLE_RO fields */

/* FIFO_IF_DISABLE_RO fields */

#define FIFO_IF_DISABLE			(BIT(0))



/* FW_REVISION_RO fields */

#define FW_REV_PROTOCOL_MSK	(GENMASK(15, 8))
@@ -330,6 +331,12 @@ struct se_geni_rsc { 
#define DEFAULT_BUS_WIDTH	(4)

#define DEFAULT_SE_CLK		(19200000)



/* GSI TRE fields */

/* Packing fields */

#define GSI_TX_PACK_EN          (BIT(0))

#define GSI_RX_PACK_EN          (BIT(1))

#define GSI_PRESERVE_PACK       (BIT(2))



#define GENI_SE_ERR(log_ctx, print, dev, x...) do { \

if (log_ctx) \

	ipc_log_string(log_ctx, x); \