Loading drivers/gpu/msm/a6xx_reg.h +412 −0 Original line number Diff line number Diff line Loading @@ -70,6 +70,20 @@ #define A6XX_CP_ADDR_MODE_CNTL 0x842 #define A6XX_CP_PROTECT_CNTL 0x84F #define A6XX_CP_PROTECT_REG 0x850 #define A6XX_CP_PERFCTR_CP_SEL_0 0x8D0 #define A6XX_CP_PERFCTR_CP_SEL_1 0x8D1 #define A6XX_CP_PERFCTR_CP_SEL_2 0x8D2 #define A6XX_CP_PERFCTR_CP_SEL_3 0x8D3 #define A6XX_CP_PERFCTR_CP_SEL_4 0x8D4 #define A6XX_CP_PERFCTR_CP_SEL_5 0x8D5 #define A6XX_CP_PERFCTR_CP_SEL_6 0x8D6 #define A6XX_CP_PERFCTR_CP_SEL_7 0x8D7 #define A6XX_CP_PERFCTR_CP_SEL_8 0x8D8 #define A6XX_CP_PERFCTR_CP_SEL_9 0x8D9 #define A6XX_CP_PERFCTR_CP_SEL_10 0x8DA #define A6XX_CP_PERFCTR_CP_SEL_11 0x8DB #define A6XX_CP_PERFCTR_CP_SEL_12 0x8DC #define A6XX_CP_PERFCTR_CP_SEL_13 0x8DD #define A6XX_CP_CRASH_SCRIPT_BASE_LO 0x900 #define A6XX_CP_CRASH_SCRIPT_BASE_HI 0x901 #define A6XX_CP_CRASH_DUMP_CNTL 0x902 Loading Loading @@ -108,6 +122,274 @@ #define A6XX_RBBM_INT_0_STATUS 0x201 #define A6XX_RBBM_STATUS 0x210 #define A6XX_RBBM_STATUS3 0x213 #define A6XX_RBBM_PERFCTR_CP_0_LO 0x400 #define A6XX_RBBM_PERFCTR_CP_0_HI 0x401 #define A6XX_RBBM_PERFCTR_CP_1_LO 0x402 #define A6XX_RBBM_PERFCTR_CP_1_HI 0x403 #define A6XX_RBBM_PERFCTR_CP_2_LO 0x404 #define A6XX_RBBM_PERFCTR_CP_2_HI 0x405 #define A6XX_RBBM_PERFCTR_CP_3_LO 0x406 #define A6XX_RBBM_PERFCTR_CP_3_HI 0x407 #define A6XX_RBBM_PERFCTR_CP_4_LO 0x408 #define A6XX_RBBM_PERFCTR_CP_4_HI 0x409 #define A6XX_RBBM_PERFCTR_CP_5_LO 0x40a #define A6XX_RBBM_PERFCTR_CP_5_HI 0x40b #define A6XX_RBBM_PERFCTR_CP_6_LO 0x40c #define A6XX_RBBM_PERFCTR_CP_6_HI 0x40d #define A6XX_RBBM_PERFCTR_CP_7_LO 0x40e #define A6XX_RBBM_PERFCTR_CP_7_HI 0x40f #define A6XX_RBBM_PERFCTR_CP_8_LO 0x410 #define A6XX_RBBM_PERFCTR_CP_8_HI 0x411 #define A6XX_RBBM_PERFCTR_CP_9_LO 0x412 #define A6XX_RBBM_PERFCTR_CP_9_HI 0x413 #define A6XX_RBBM_PERFCTR_CP_10_LO 0x414 #define A6XX_RBBM_PERFCTR_CP_10_HI 0x415 #define A6XX_RBBM_PERFCTR_CP_11_LO 0x416 #define A6XX_RBBM_PERFCTR_CP_11_HI 0x417 #define A6XX_RBBM_PERFCTR_CP_12_LO 0x418 #define A6XX_RBBM_PERFCTR_CP_12_HI 0x419 #define A6XX_RBBM_PERFCTR_CP_13_LO 0x41a #define A6XX_RBBM_PERFCTR_CP_13_HI 0x41b #define A6XX_RBBM_PERFCTR_RBBM_0_LO 0x41c #define A6XX_RBBM_PERFCTR_RBBM_0_HI 0x41d #define A6XX_RBBM_PERFCTR_RBBM_1_LO 0x41e #define A6XX_RBBM_PERFCTR_RBBM_1_HI 0x41f #define A6XX_RBBM_PERFCTR_RBBM_2_LO 0x420 #define A6XX_RBBM_PERFCTR_RBBM_2_HI 0x421 #define A6XX_RBBM_PERFCTR_RBBM_3_LO 0x422 #define A6XX_RBBM_PERFCTR_RBBM_3_HI 0x423 #define A6XX_RBBM_PERFCTR_PC_0_LO 0x424 #define A6XX_RBBM_PERFCTR_PC_0_HI 0x425 #define A6XX_RBBM_PERFCTR_PC_1_LO 0x426 #define A6XX_RBBM_PERFCTR_PC_1_HI 0x427 #define A6XX_RBBM_PERFCTR_PC_2_LO 0x428 #define A6XX_RBBM_PERFCTR_PC_2_HI 0x429 #define A6XX_RBBM_PERFCTR_PC_3_LO 0x42a #define A6XX_RBBM_PERFCTR_PC_3_HI 0x42b #define A6XX_RBBM_PERFCTR_PC_4_LO 0x42c #define A6XX_RBBM_PERFCTR_PC_4_HI 0x42d #define A6XX_RBBM_PERFCTR_PC_5_LO 0x42e #define A6XX_RBBM_PERFCTR_PC_5_HI 0x42f #define A6XX_RBBM_PERFCTR_PC_6_LO 0x430 #define A6XX_RBBM_PERFCTR_PC_6_HI 0x431 #define A6XX_RBBM_PERFCTR_PC_7_LO 0x432 #define A6XX_RBBM_PERFCTR_PC_7_HI 0x433 #define A6XX_RBBM_PERFCTR_VFD_0_LO 0x434 #define A6XX_RBBM_PERFCTR_VFD_0_HI 0x435 #define A6XX_RBBM_PERFCTR_VFD_1_LO 0x436 #define A6XX_RBBM_PERFCTR_VFD_1_HI 0x437 #define A6XX_RBBM_PERFCTR_VFD_2_LO 0x438 #define A6XX_RBBM_PERFCTR_VFD_2_HI 0x439 #define A6XX_RBBM_PERFCTR_VFD_3_LO 0x43a #define A6XX_RBBM_PERFCTR_VFD_3_HI 0x43b #define A6XX_RBBM_PERFCTR_VFD_4_LO 0x43c #define A6XX_RBBM_PERFCTR_VFD_4_HI 0x43d #define A6XX_RBBM_PERFCTR_VFD_5_LO 0x43e #define A6XX_RBBM_PERFCTR_VFD_5_HI 0x43f #define A6XX_RBBM_PERFCTR_VFD_6_LO 0x440 #define A6XX_RBBM_PERFCTR_VFD_6_HI 0x441 #define A6XX_RBBM_PERFCTR_VFD_7_LO 0x442 #define A6XX_RBBM_PERFCTR_VFD_7_HI 0x443 #define A6XX_RBBM_PERFCTR_HLSQ_0_LO 0x444 #define A6XX_RBBM_PERFCTR_HLSQ_0_HI 0x445 #define A6XX_RBBM_PERFCTR_HLSQ_1_LO 0x446 #define A6XX_RBBM_PERFCTR_HLSQ_1_HI 0x447 #define A6XX_RBBM_PERFCTR_HLSQ_2_LO 0x448 #define A6XX_RBBM_PERFCTR_HLSQ_2_HI 0x449 #define A6XX_RBBM_PERFCTR_HLSQ_3_LO 0x44a #define A6XX_RBBM_PERFCTR_HLSQ_3_HI 0x44b #define A6XX_RBBM_PERFCTR_HLSQ_4_LO 0x44c #define A6XX_RBBM_PERFCTR_HLSQ_4_HI 0x44d #define A6XX_RBBM_PERFCTR_HLSQ_5_LO 0x44e #define A6XX_RBBM_PERFCTR_HLSQ_5_HI 0x44f #define A6XX_RBBM_PERFCTR_VPC_0_LO 0x450 #define A6XX_RBBM_PERFCTR_VPC_0_HI 0x451 #define A6XX_RBBM_PERFCTR_VPC_1_LO 0x452 #define A6XX_RBBM_PERFCTR_VPC_1_HI 0x453 #define A6XX_RBBM_PERFCTR_VPC_2_LO 0x454 #define A6XX_RBBM_PERFCTR_VPC_2_HI 0x455 #define A6XX_RBBM_PERFCTR_VPC_3_LO 0x456 #define A6XX_RBBM_PERFCTR_VPC_3_HI 0x457 #define A6XX_RBBM_PERFCTR_VPC_4_LO 0x458 #define A6XX_RBBM_PERFCTR_VPC_4_HI 0x459 #define A6XX_RBBM_PERFCTR_VPC_5_LO 0x45a #define A6XX_RBBM_PERFCTR_VPC_5_HI 0x45b #define A6XX_RBBM_PERFCTR_CCU_0_LO 0x45c #define A6XX_RBBM_PERFCTR_CCU_0_HI 0x45d #define A6XX_RBBM_PERFCTR_CCU_1_LO 0x45e #define A6XX_RBBM_PERFCTR_CCU_1_HI 0x45f #define A6XX_RBBM_PERFCTR_CCU_2_LO 0x460 #define A6XX_RBBM_PERFCTR_CCU_2_HI 0x461 #define A6XX_RBBM_PERFCTR_CCU_3_LO 0x462 #define A6XX_RBBM_PERFCTR_CCU_3_HI 0x463 #define A6XX_RBBM_PERFCTR_CCU_4_LO 0x464 #define A6XX_RBBM_PERFCTR_CCU_4_HI 0x465 #define A6XX_RBBM_PERFCTR_TSE_0_LO 0x466 #define A6XX_RBBM_PERFCTR_TSE_0_HI 0x467 #define A6XX_RBBM_PERFCTR_TSE_1_LO 0x468 #define A6XX_RBBM_PERFCTR_TSE_1_HI 0x469 #define A6XX_RBBM_PERFCTR_TSE_2_LO 0x46a #define A6XX_RBBM_PERFCTR_CCU_4_HI 0x465 #define A6XX_RBBM_PERFCTR_TSE_0_LO 0x466 #define A6XX_RBBM_PERFCTR_TSE_0_HI 0x467 #define A6XX_RBBM_PERFCTR_TSE_1_LO 0x468 #define A6XX_RBBM_PERFCTR_TSE_1_HI 0x469 #define A6XX_RBBM_PERFCTR_TSE_2_LO 0x46a #define A6XX_RBBM_PERFCTR_TSE_2_HI 0x46b #define A6XX_RBBM_PERFCTR_TSE_3_LO 0x46c #define A6XX_RBBM_PERFCTR_TSE_3_HI 0x46d #define A6XX_RBBM_PERFCTR_RAS_0_LO 0x46e #define A6XX_RBBM_PERFCTR_RAS_0_HI 0x46f #define A6XX_RBBM_PERFCTR_RAS_1_LO 0x470 #define A6XX_RBBM_PERFCTR_RAS_1_HI 0x471 #define A6XX_RBBM_PERFCTR_RAS_2_LO 0x472 #define A6XX_RBBM_PERFCTR_RAS_2_HI 0x473 #define A6XX_RBBM_PERFCTR_RAS_3_LO 0x474 #define A6XX_RBBM_PERFCTR_RAS_3_HI 0x475 #define A6XX_RBBM_PERFCTR_UCHE_0_LO 0x476 #define A6XX_RBBM_PERFCTR_UCHE_0_HI 0x477 #define A6XX_RBBM_PERFCTR_UCHE_1_LO 0x478 #define A6XX_RBBM_PERFCTR_UCHE_1_HI 0x479 #define A6XX_RBBM_PERFCTR_UCHE_2_LO 0x47a #define A6XX_RBBM_PERFCTR_UCHE_2_HI 0x47b #define A6XX_RBBM_PERFCTR_UCHE_3_LO 0x47c #define A6XX_RBBM_PERFCTR_UCHE_3_HI 0x47d #define A6XX_RBBM_PERFCTR_UCHE_4_LO 0x47e #define A6XX_RBBM_PERFCTR_UCHE_4_HI 0x47f #define A6XX_RBBM_PERFCTR_UCHE_5_LO 0x480 #define A6XX_RBBM_PERFCTR_UCHE_5_HI 0x481 #define A6XX_RBBM_PERFCTR_UCHE_6_LO 0x482 #define A6XX_RBBM_PERFCTR_UCHE_6_HI 0x483 #define A6XX_RBBM_PERFCTR_UCHE_7_LO 0x484 #define A6XX_RBBM_PERFCTR_UCHE_7_HI 0x485 #define A6XX_RBBM_PERFCTR_UCHE_8_LO 0x486 #define A6XX_RBBM_PERFCTR_UCHE_8_HI 0x487 #define A6XX_RBBM_PERFCTR_UCHE_9_LO 0x488 #define A6XX_RBBM_PERFCTR_UCHE_9_HI 0x489 #define A6XX_RBBM_PERFCTR_UCHE_10_LO 0x48a #define A6XX_RBBM_PERFCTR_UCHE_10_HI 0x48b #define A6XX_RBBM_PERFCTR_UCHE_11_LO 0x48c #define A6XX_RBBM_PERFCTR_UCHE_11_HI 0x48d #define A6XX_RBBM_PERFCTR_TP_0_LO 0x48e #define A6XX_RBBM_PERFCTR_TP_0_HI 0x48f #define A6XX_RBBM_PERFCTR_TP_1_LO 0x490 #define A6XX_RBBM_PERFCTR_TP_1_HI 0x491 #define A6XX_RBBM_PERFCTR_TP_2_LO 0x492 #define A6XX_RBBM_PERFCTR_TP_2_HI 0x493 #define A6XX_RBBM_PERFCTR_TP_3_LO 0x494 #define A6XX_RBBM_PERFCTR_TP_3_HI 0x495 #define A6XX_RBBM_PERFCTR_TP_4_LO 0x496 #define A6XX_RBBM_PERFCTR_TP_4_HI 0x497 #define A6XX_RBBM_PERFCTR_TP_5_LO 0x498 #define A6XX_RBBM_PERFCTR_TP_5_HI 0x499 #define A6XX_RBBM_PERFCTR_TP_6_LO 0x49a #define A6XX_RBBM_PERFCTR_TP_6_HI 0x49b #define A6XX_RBBM_PERFCTR_TP_7_LO 0x49c #define A6XX_RBBM_PERFCTR_TP_7_HI 0x49d #define A6XX_RBBM_PERFCTR_TP_8_LO 0x49e #define A6XX_RBBM_PERFCTR_TP_8_HI 0x49f #define A6XX_RBBM_PERFCTR_TP_9_LO 0x4a0 #define A6XX_RBBM_PERFCTR_TP_9_HI 0x4a1 #define A6XX_RBBM_PERFCTR_TP_10_LO 0x4a2 #define A6XX_RBBM_PERFCTR_TP_10_HI 0x4a3 #define A6XX_RBBM_PERFCTR_TP_11_LO 0x4a4 #define A6XX_RBBM_PERFCTR_TP_11_HI 0x4a5 #define A6XX_RBBM_PERFCTR_SP_0_LO 0x4a6 #define A6XX_RBBM_PERFCTR_SP_0_HI 0x4a7 #define A6XX_RBBM_PERFCTR_SP_1_LO 0x4a8 #define A6XX_RBBM_PERFCTR_SP_1_HI 0x4a9 #define A6XX_RBBM_PERFCTR_SP_2_LO 0x4aa #define A6XX_RBBM_PERFCTR_SP_2_HI 0x4ab #define A6XX_RBBM_PERFCTR_SP_3_LO 0x4ac #define A6XX_RBBM_PERFCTR_SP_3_HI 0x4ad #define A6XX_RBBM_PERFCTR_SP_4_LO 0x4ae #define A6XX_RBBM_PERFCTR_SP_4_HI 0x4af #define A6XX_RBBM_PERFCTR_SP_5_LO 0x4b0 #define A6XX_RBBM_PERFCTR_SP_5_HI 0x4b1 #define A6XX_RBBM_PERFCTR_SP_6_LO 0x4b2 #define A6XX_RBBM_PERFCTR_SP_6_HI 0x4b3 #define A6XX_RBBM_PERFCTR_SP_7_LO 0x4b4 #define A6XX_RBBM_PERFCTR_SP_7_HI 0x4b5 #define A6XX_RBBM_PERFCTR_SP_8_LO 0x4b6 #define A6XX_RBBM_PERFCTR_SP_8_HI 0x4b7 #define A6XX_RBBM_PERFCTR_SP_9_LO 0x4b8 #define A6XX_RBBM_PERFCTR_SP_9_HI 0x4b9 #define A6XX_RBBM_PERFCTR_SP_10_LO 0x4ba #define A6XX_RBBM_PERFCTR_SP_10_HI 0x4bb #define A6XX_RBBM_PERFCTR_SP_11_LO 0x4bc #define A6XX_RBBM_PERFCTR_SP_11_HI 0x4bd #define A6XX_RBBM_PERFCTR_SP_12_LO 0x4be #define A6XX_RBBM_PERFCTR_SP_12_HI 0x4bf #define A6XX_RBBM_PERFCTR_SP_13_LO 0x4c0 #define A6XX_RBBM_PERFCTR_SP_13_HI 0x4c1 #define A6XX_RBBM_PERFCTR_SP_14_LO 0x4c2 #define A6XX_RBBM_PERFCTR_SP_14_HI 0x4c3 #define A6XX_RBBM_PERFCTR_SP_15_LO 0x4c4 #define A6XX_RBBM_PERFCTR_SP_15_HI 0x4c5 #define A6XX_RBBM_PERFCTR_SP_16_LO 0x4c6 #define A6XX_RBBM_PERFCTR_SP_16_HI 0x4c7 #define A6XX_RBBM_PERFCTR_SP_17_LO 0x4c8 #define A6XX_RBBM_PERFCTR_SP_17_HI 0x4c9 #define A6XX_RBBM_PERFCTR_SP_18_LO 0x4ca #define A6XX_RBBM_PERFCTR_SP_18_HI 0x4cb #define A6XX_RBBM_PERFCTR_SP_19_LO 0x4cc #define A6XX_RBBM_PERFCTR_SP_19_HI 0x4cd #define A6XX_RBBM_PERFCTR_SP_20_LO 0x4ce #define A6XX_RBBM_PERFCTR_SP_20_HI 0x4cf #define A6XX_RBBM_PERFCTR_SP_21_LO 0x4d0 #define A6XX_RBBM_PERFCTR_SP_21_HI 0x4d1 #define A6XX_RBBM_PERFCTR_SP_22_LO 0x4d2 #define A6XX_RBBM_PERFCTR_SP_22_HI 0x4d3 #define A6XX_RBBM_PERFCTR_SP_23_LO 0x4d4 #define A6XX_RBBM_PERFCTR_SP_23_HI 0x4d5 #define A6XX_RBBM_PERFCTR_RB_0_LO 0x4d6 #define A6XX_RBBM_PERFCTR_RB_0_HI 0x4d7 #define A6XX_RBBM_PERFCTR_RB_1_LO 0x4d8 #define A6XX_RBBM_PERFCTR_RB_1_HI 0x4d9 #define A6XX_RBBM_PERFCTR_RB_2_LO 0x4da #define A6XX_RBBM_PERFCTR_RB_2_HI 0x4db #define A6XX_RBBM_PERFCTR_RB_3_LO 0x4dc #define A6XX_RBBM_PERFCTR_RB_3_HI 0x4dd #define A6XX_RBBM_PERFCTR_RB_4_LO 0x4de #define A6XX_RBBM_PERFCTR_RB_4_HI 0x4df #define A6XX_RBBM_PERFCTR_RB_5_LO 0x4e0 #define A6XX_RBBM_PERFCTR_RB_5_HI 0x4e1 #define A6XX_RBBM_PERFCTR_RB_6_LO 0x4e2 #define A6XX_RBBM_PERFCTR_RB_6_HI 0x4e3 #define A6XX_RBBM_PERFCTR_RB_7_LO 0x4e4 #define A6XX_RBBM_PERFCTR_RB_7_HI 0x4e5 #define A6XX_RBBM_PERFCTR_VSC_0_LO 0x4e6 #define A6XX_RBBM_PERFCTR_VSC_0_HI 0x4e7 #define A6XX_RBBM_PERFCTR_VSC_1_LO 0x4e8 #define A6XX_RBBM_PERFCTR_VSC_1_HI 0x4e9 #define A6XX_RBBM_PERFCTR_LRZ_0_LO 0x4ea #define A6XX_RBBM_PERFCTR_LRZ_0_HI 0x4eb #define A6XX_RBBM_PERFCTR_LRZ_1_LO 0x4ec #define A6XX_RBBM_PERFCTR_LRZ_1_HI 0x4ed #define A6XX_RBBM_PERFCTR_LRZ_2_LO 0x4ee #define A6XX_RBBM_PERFCTR_LRZ_2_HI 0x4ef #define A6XX_RBBM_PERFCTR_LRZ_3_LO 0x4f0 #define A6XX_RBBM_PERFCTR_LRZ_3_HI 0x4f1 #define A6XX_RBBM_PERFCTR_CMP_0_LO 0x4f2 #define A6XX_RBBM_PERFCTR_CMP_0_HI 0x4f3 #define A6XX_RBBM_PERFCTR_CMP_1_LO 0x4f4 #define A6XX_RBBM_PERFCTR_CMP_1_HI 0x4f5 #define A6XX_RBBM_PERFCTR_CMP_2_LO 0x4f6 #define A6XX_RBBM_PERFCTR_CMP_2_HI 0x4f7 #define A6XX_RBBM_PERFCTR_CMP_3_LO 0x4f8 #define A6XX_RBBM_PERFCTR_CMP_3_HI 0x4f9 #define A6XX_RBBM_PERFCTR_CNTL 0x500 #define A6XX_RBBM_PERFCTR_LOAD_CMD0 0x501 #define A6XX_RBBM_PERFCTR_LOAD_CMD1 0x502 #define A6XX_RBBM_PERFCTR_LOAD_CMD2 0x503 #define A6XX_RBBM_PERFCTR_LOAD_CMD3 0x504 #define A6XX_RBBM_PERFCTR_LOAD_VALUE_LO 0x505 #define A6XX_RBBM_PERFCTR_LOAD_VALUE_HI 0x506 #define A6XX_RBBM_PERFCTR_RBBM_SEL_0 0x507 #define A6XX_RBBM_PERFCTR_RBBM_SEL_1 0x508 #define A6XX_RBBM_PERFCTR_RBBM_SEL_2 0x509 #define A6XX_RBBM_PERFCTR_RBBM_SEL_3 0x50A #define A6XX_RBBM_SECVID_TRUST_CNTL 0xF400 #define A6XX_RBBM_SECVID_TSB_ADDR_MODE_CNTL 0xF810 Loading Loading @@ -154,26 +436,87 @@ #define A6XX_DBGC_CFG_DBGBUS_TRACE_BUF2 0x630 /* VSC registers */ #define A6XX_VSC_PERFCTR_VSC_SEL_0 0xCD8 #define A6XX_VSC_PERFCTR_VSC_SEL_1 0xCD9 /* GRAS registers */ #define A6XX_GRAS_ADDR_MODE_CNTL 0x8601 #define A6XX_GRAS_PERFCTR_TSE_SEL_0 0x8610 #define A6XX_GRAS_PERFCTR_TSE_SEL_1 0x8611 #define A6XX_GRAS_PERFCTR_TSE_SEL_2 0x8612 #define A6XX_GRAS_PERFCTR_TSE_SEL_3 0x8613 #define A6XX_GRAS_PERFCTR_RAS_SEL_0 0x8614 #define A6XX_GRAS_PERFCTR_RAS_SEL_1 0x8615 #define A6XX_GRAS_PERFCTR_RAS_SEL_2 0x8616 #define A6XX_GRAS_PERFCTR_RAS_SEL_3 0x8617 #define A6XX_GRAS_PERFCTR_LRZ_SEL_0 0x8618 #define A6XX_GRAS_PERFCTR_LRZ_SEL_1 0x8619 #define A6XX_GRAS_PERFCTR_LRZ_SEL_2 0x861A #define A6XX_GRAS_PERFCTR_LRZ_SEL_3 0x861B /* RB registers */ #define A6XX_RB_ADDR_MODE_CNTL 0x8E05 #define A6XX_RB_NC_MODE_CNTL 0x8E08 #define A6XX_RB_PERFCTR_RB_SEL_0 0x8E10 #define A6XX_RB_PERFCTR_RB_SEL_1 0x8E11 #define A6XX_RB_PERFCTR_RB_SEL_2 0x8E12 #define A6XX_RB_PERFCTR_RB_SEL_3 0x8E13 #define A6XX_RB_PERFCTR_RB_SEL_4 0x8E14 #define A6XX_RB_PERFCTR_RB_SEL_5 0x8E15 #define A6XX_RB_PERFCTR_RB_SEL_6 0x8E16 #define A6XX_RB_PERFCTR_RB_SEL_7 0x8E17 #define A6XX_RB_PERFCTR_CCU_SEL_0 0x8E18 #define A6XX_RB_PERFCTR_CCU_SEL_1 0x8E19 #define A6XX_RB_PERFCTR_CCU_SEL_2 0x8E1A #define A6XX_RB_PERFCTR_CCU_SEL_3 0x8E1B #define A6XX_RB_PERFCTR_CCU_SEL_4 0x8E1C #define A6XX_RB_PERFCTR_CMP_SEL_0 0x8E2C #define A6XX_RB_PERFCTR_CMP_SEL_1 0x8E2D #define A6XX_RB_PERFCTR_CMP_SEL_2 0x8E2E #define A6XX_RB_PERFCTR_CMP_SEL_3 0x8E2F /* PC registers */ #define A6XX_PC_DBG_ECO_CNTL 0x9E00 #define A6XX_PC_ADDR_MODE_CNTL 0x9E01 #define A6XX_PC_PERFCTR_PC_SEL_0 0x9E34 #define A6XX_PC_PERFCTR_PC_SEL_1 0x9E35 #define A6XX_PC_PERFCTR_PC_SEL_2 0x9E36 #define A6XX_PC_PERFCTR_PC_SEL_3 0x9E37 #define A6XX_PC_PERFCTR_PC_SEL_4 0x9E38 #define A6XX_PC_PERFCTR_PC_SEL_5 0x9E39 #define A6XX_PC_PERFCTR_PC_SEL_6 0x9E3A #define A6XX_PC_PERFCTR_PC_SEL_7 0x9E3B /* HLSQ registers */ #define A6XX_HLSQ_ADDR_MODE_CNTL 0xBE05 #define A6XX_HLSQ_PERFCTR_HLSQ_SEL_0 0xBE10 #define A6XX_HLSQ_PERFCTR_HLSQ_SEL_1 0xBE11 #define A6XX_HLSQ_PERFCTR_HLSQ_SEL_2 0xBE12 #define A6XX_HLSQ_PERFCTR_HLSQ_SEL_3 0xBE13 #define A6XX_HLSQ_PERFCTR_HLSQ_SEL_4 0xBE14 #define A6XX_HLSQ_PERFCTR_HLSQ_SEL_5 0xBE15 #define A6XX_HLSQ_DBG_AHB_READ_APERTURE 0xC800 #define A6XX_HLSQ_DBG_READ_SEL 0xD000 /* VFD registers */ #define A6XX_VFD_ADDR_MODE_CNTL 0xA601 #define A6XX_VFD_PERFCTR_VFD_SEL_0 0xA610 #define A6XX_VFD_PERFCTR_VFD_SEL_1 0xA611 #define A6XX_VFD_PERFCTR_VFD_SEL_2 0xA612 #define A6XX_VFD_PERFCTR_VFD_SEL_3 0xA613 #define A6XX_VFD_PERFCTR_VFD_SEL_4 0xA614 #define A6XX_VFD_PERFCTR_VFD_SEL_5 0xA615 #define A6XX_VFD_PERFCTR_VFD_SEL_6 0xA616 #define A6XX_VFD_PERFCTR_VFD_SEL_7 0xA617 /* VPC registers */ #define A6XX_VPC_ADDR_MODE_CNTL 0x9601 #define A6XX_VPC_PERFCTR_VPC_SEL_0 0x9604 #define A6XX_VPC_PERFCTR_VPC_SEL_1 0x9605 #define A6XX_VPC_PERFCTR_VPC_SEL_2 0x9606 #define A6XX_VPC_PERFCTR_VPC_SEL_3 0x9607 #define A6XX_VPC_PERFCTR_VPC_SEL_4 0x9608 #define A6XX_VPC_PERFCTR_VPC_SEL_5 0x9609 /* UCHE registers */ #define A6XX_UCHE_ADDR_MODE_CNTL 0xE00 Loading @@ -190,20 +533,89 @@ #define A6XX_UCHE_GMEM_RANGE_MAX_HI 0xE0E #define A6XX_UCHE_CACHE_WAYS 0xE17 #define A6XX_UCHE_FILTER_CNTL 0xE18 #define A6XX_UCHE_PERFCTR_UCHE_SEL_0 0xE1C #define A6XX_UCHE_PERFCTR_UCHE_SEL_1 0xE1D #define A6XX_UCHE_PERFCTR_UCHE_SEL_2 0xE1E #define A6XX_UCHE_PERFCTR_UCHE_SEL_3 0xE1F #define A6XX_UCHE_PERFCTR_UCHE_SEL_4 0xE20 #define A6XX_UCHE_PERFCTR_UCHE_SEL_5 0xE21 #define A6XX_UCHE_PERFCTR_UCHE_SEL_6 0xE22 #define A6XX_UCHE_PERFCTR_UCHE_SEL_7 0xE23 #define A6XX_UCHE_PERFCTR_UCHE_SEL_8 0xE24 #define A6XX_UCHE_PERFCTR_UCHE_SEL_9 0xE25 #define A6XX_UCHE_PERFCTR_UCHE_SEL_10 0xE26 #define A6XX_UCHE_PERFCTR_UCHE_SEL_11 0xE27 /* SP registers */ #define A6XX_SP_ADDR_MODE_CNTL 0xAE01 #define A6XX_SP_NC_MODE_CNTL 0xAE02 #define A6XX_SP_PERFCTR_SP_SEL_0 0xAE10 #define A6XX_SP_PERFCTR_SP_SEL_1 0xAE11 #define A6XX_SP_PERFCTR_SP_SEL_2 0xAE12 #define A6XX_SP_PERFCTR_SP_SEL_3 0xAE13 #define A6XX_SP_PERFCTR_SP_SEL_4 0xAE14 #define A6XX_SP_PERFCTR_SP_SEL_5 0xAE15 #define A6XX_SP_PERFCTR_SP_SEL_6 0xAE16 #define A6XX_SP_PERFCTR_SP_SEL_7 0xAE17 #define A6XX_SP_PERFCTR_SP_SEL_8 0xAE18 #define A6XX_SP_PERFCTR_SP_SEL_9 0xAE19 #define A6XX_SP_PERFCTR_SP_SEL_10 0xAE1A #define A6XX_SP_PERFCTR_SP_SEL_11 0xAE1B #define A6XX_SP_PERFCTR_SP_SEL_12 0xAE1C #define A6XX_SP_PERFCTR_SP_SEL_13 0xAE1D #define A6XX_SP_PERFCTR_SP_SEL_14 0xAE1E #define A6XX_SP_PERFCTR_SP_SEL_15 0xAE1F #define A6XX_SP_PERFCTR_SP_SEL_16 0xAE20 #define A6XX_SP_PERFCTR_SP_SEL_17 0xAE21 #define A6XX_SP_PERFCTR_SP_SEL_18 0xAE22 #define A6XX_SP_PERFCTR_SP_SEL_19 0xAE23 #define A6XX_SP_PERFCTR_SP_SEL_20 0xAE24 #define A6XX_SP_PERFCTR_SP_SEL_21 0xAE25 #define A6XX_SP_PERFCTR_SP_SEL_22 0xAE26 #define A6XX_SP_PERFCTR_SP_SEL_23 0xAE27 /* TP registers */ #define A6XX_TPL1_ADDR_MODE_CNTL 0xB601 #define A6XX_TPL1_NC_MODE_CNTL 0xB604 #define A6XX_TPL1_PERFCTR_TP_SEL_0 0xB610 #define A6XX_TPL1_PERFCTR_TP_SEL_1 0xB611 #define A6XX_TPL1_PERFCTR_TP_SEL_2 0xB612 #define A6XX_TPL1_PERFCTR_TP_SEL_3 0xB613 #define A6XX_TPL1_PERFCTR_TP_SEL_4 0xB614 #define A6XX_TPL1_PERFCTR_TP_SEL_5 0xB615 #define A6XX_TPL1_PERFCTR_TP_SEL_6 0xB616 #define A6XX_TPL1_PERFCTR_TP_SEL_7 0xB617 #define A6XX_TPL1_PERFCTR_TP_SEL_8 0xB618 #define A6XX_TPL1_PERFCTR_TP_SEL_9 0xB619 #define A6XX_TPL1_PERFCTR_TP_SEL_10 0xB61A #define A6XX_TPL1_PERFCTR_TP_SEL_11 0xB61B /* VBIF registers */ #define A6XX_VBIF_VERSION 0x3000 #define A6XX_VBIF_GATE_OFF_WRREQ_EN 0x302A #define A6XX_VBIF_XIN_HALT_CTRL0 0x3080 #define A6XX_VBIF_XIN_HALT_CTRL1 0x3081 #define A6XX_VBIF_PERF_CNT_SEL0 0x30d0 #define A6XX_VBIF_PERF_CNT_SEL1 0x30d1 #define A6XX_VBIF_PERF_CNT_SEL2 0x30d2 #define A6XX_VBIF_PERF_CNT_SEL3 0x30d3 #define A6XX_VBIF_PERF_CNT_LOW0 0x30d8 #define A6XX_VBIF_PERF_CNT_LOW1 0x30d9 #define A6XX_VBIF_PERF_CNT_LOW2 0x30da #define A6XX_VBIF_PERF_CNT_LOW3 0x30db #define A6XX_VBIF_PERF_CNT_HIGH0 0x30e0 #define A6XX_VBIF_PERF_CNT_HIGH1 0x30e1 #define A6XX_VBIF_PERF_CNT_HIGH2 0x30e2 #define A6XX_VBIF_PERF_CNT_HIGH3 0x30e3 #define A6XX_VBIF_PERF_PWR_CNT_EN0 0x3100 #define A6XX_VBIF_PERF_PWR_CNT_EN1 0x3101 #define A6XX_VBIF_PERF_PWR_CNT_EN2 0x3102 #define A6XX_VBIF_PERF_PWR_CNT_LOW0 0x3110 #define A6XX_VBIF_PERF_PWR_CNT_LOW1 0x3111 #define A6XX_VBIF_PERF_PWR_CNT_LOW2 0x3112 #define A6XX_VBIF_PERF_PWR_CNT_HIGH0 0x3118 #define A6XX_VBIF_PERF_PWR_CNT_HIGH1 0x3119 #define A6XX_VBIF_PERF_PWR_CNT_HIGH2 0x311a /* GMU control registers */ #define A6XX_GMU_GX_SPTPRAC_POWER_CONTROL 0x1A881 Loading drivers/gpu/msm/adreno_a6xx.c +375 −0 File changed.Preview size limit exceeded, changes collapsed. Show changes Loading
drivers/gpu/msm/a6xx_reg.h +412 −0 Original line number Diff line number Diff line Loading @@ -70,6 +70,20 @@ #define A6XX_CP_ADDR_MODE_CNTL 0x842 #define A6XX_CP_PROTECT_CNTL 0x84F #define A6XX_CP_PROTECT_REG 0x850 #define A6XX_CP_PERFCTR_CP_SEL_0 0x8D0 #define A6XX_CP_PERFCTR_CP_SEL_1 0x8D1 #define A6XX_CP_PERFCTR_CP_SEL_2 0x8D2 #define A6XX_CP_PERFCTR_CP_SEL_3 0x8D3 #define A6XX_CP_PERFCTR_CP_SEL_4 0x8D4 #define A6XX_CP_PERFCTR_CP_SEL_5 0x8D5 #define A6XX_CP_PERFCTR_CP_SEL_6 0x8D6 #define A6XX_CP_PERFCTR_CP_SEL_7 0x8D7 #define A6XX_CP_PERFCTR_CP_SEL_8 0x8D8 #define A6XX_CP_PERFCTR_CP_SEL_9 0x8D9 #define A6XX_CP_PERFCTR_CP_SEL_10 0x8DA #define A6XX_CP_PERFCTR_CP_SEL_11 0x8DB #define A6XX_CP_PERFCTR_CP_SEL_12 0x8DC #define A6XX_CP_PERFCTR_CP_SEL_13 0x8DD #define A6XX_CP_CRASH_SCRIPT_BASE_LO 0x900 #define A6XX_CP_CRASH_SCRIPT_BASE_HI 0x901 #define A6XX_CP_CRASH_DUMP_CNTL 0x902 Loading Loading @@ -108,6 +122,274 @@ #define A6XX_RBBM_INT_0_STATUS 0x201 #define A6XX_RBBM_STATUS 0x210 #define A6XX_RBBM_STATUS3 0x213 #define A6XX_RBBM_PERFCTR_CP_0_LO 0x400 #define A6XX_RBBM_PERFCTR_CP_0_HI 0x401 #define A6XX_RBBM_PERFCTR_CP_1_LO 0x402 #define A6XX_RBBM_PERFCTR_CP_1_HI 0x403 #define A6XX_RBBM_PERFCTR_CP_2_LO 0x404 #define A6XX_RBBM_PERFCTR_CP_2_HI 0x405 #define A6XX_RBBM_PERFCTR_CP_3_LO 0x406 #define A6XX_RBBM_PERFCTR_CP_3_HI 0x407 #define A6XX_RBBM_PERFCTR_CP_4_LO 0x408 #define A6XX_RBBM_PERFCTR_CP_4_HI 0x409 #define A6XX_RBBM_PERFCTR_CP_5_LO 0x40a #define A6XX_RBBM_PERFCTR_CP_5_HI 0x40b #define A6XX_RBBM_PERFCTR_CP_6_LO 0x40c #define A6XX_RBBM_PERFCTR_CP_6_HI 0x40d #define A6XX_RBBM_PERFCTR_CP_7_LO 0x40e #define A6XX_RBBM_PERFCTR_CP_7_HI 0x40f #define A6XX_RBBM_PERFCTR_CP_8_LO 0x410 #define A6XX_RBBM_PERFCTR_CP_8_HI 0x411 #define A6XX_RBBM_PERFCTR_CP_9_LO 0x412 #define A6XX_RBBM_PERFCTR_CP_9_HI 0x413 #define A6XX_RBBM_PERFCTR_CP_10_LO 0x414 #define A6XX_RBBM_PERFCTR_CP_10_HI 0x415 #define A6XX_RBBM_PERFCTR_CP_11_LO 0x416 #define A6XX_RBBM_PERFCTR_CP_11_HI 0x417 #define A6XX_RBBM_PERFCTR_CP_12_LO 0x418 #define A6XX_RBBM_PERFCTR_CP_12_HI 0x419 #define A6XX_RBBM_PERFCTR_CP_13_LO 0x41a #define A6XX_RBBM_PERFCTR_CP_13_HI 0x41b #define A6XX_RBBM_PERFCTR_RBBM_0_LO 0x41c #define A6XX_RBBM_PERFCTR_RBBM_0_HI 0x41d #define A6XX_RBBM_PERFCTR_RBBM_1_LO 0x41e #define A6XX_RBBM_PERFCTR_RBBM_1_HI 0x41f #define A6XX_RBBM_PERFCTR_RBBM_2_LO 0x420 #define A6XX_RBBM_PERFCTR_RBBM_2_HI 0x421 #define A6XX_RBBM_PERFCTR_RBBM_3_LO 0x422 #define A6XX_RBBM_PERFCTR_RBBM_3_HI 0x423 #define A6XX_RBBM_PERFCTR_PC_0_LO 0x424 #define A6XX_RBBM_PERFCTR_PC_0_HI 0x425 #define A6XX_RBBM_PERFCTR_PC_1_LO 0x426 #define A6XX_RBBM_PERFCTR_PC_1_HI 0x427 #define A6XX_RBBM_PERFCTR_PC_2_LO 0x428 #define A6XX_RBBM_PERFCTR_PC_2_HI 0x429 #define A6XX_RBBM_PERFCTR_PC_3_LO 0x42a #define A6XX_RBBM_PERFCTR_PC_3_HI 0x42b #define A6XX_RBBM_PERFCTR_PC_4_LO 0x42c #define A6XX_RBBM_PERFCTR_PC_4_HI 0x42d #define A6XX_RBBM_PERFCTR_PC_5_LO 0x42e #define A6XX_RBBM_PERFCTR_PC_5_HI 0x42f #define A6XX_RBBM_PERFCTR_PC_6_LO 0x430 #define A6XX_RBBM_PERFCTR_PC_6_HI 0x431 #define A6XX_RBBM_PERFCTR_PC_7_LO 0x432 #define A6XX_RBBM_PERFCTR_PC_7_HI 0x433 #define A6XX_RBBM_PERFCTR_VFD_0_LO 0x434 #define A6XX_RBBM_PERFCTR_VFD_0_HI 0x435 #define A6XX_RBBM_PERFCTR_VFD_1_LO 0x436 #define A6XX_RBBM_PERFCTR_VFD_1_HI 0x437 #define A6XX_RBBM_PERFCTR_VFD_2_LO 0x438 #define A6XX_RBBM_PERFCTR_VFD_2_HI 0x439 #define A6XX_RBBM_PERFCTR_VFD_3_LO 0x43a #define A6XX_RBBM_PERFCTR_VFD_3_HI 0x43b #define A6XX_RBBM_PERFCTR_VFD_4_LO 0x43c #define A6XX_RBBM_PERFCTR_VFD_4_HI 0x43d #define A6XX_RBBM_PERFCTR_VFD_5_LO 0x43e #define A6XX_RBBM_PERFCTR_VFD_5_HI 0x43f #define A6XX_RBBM_PERFCTR_VFD_6_LO 0x440 #define A6XX_RBBM_PERFCTR_VFD_6_HI 0x441 #define A6XX_RBBM_PERFCTR_VFD_7_LO 0x442 #define A6XX_RBBM_PERFCTR_VFD_7_HI 0x443 #define A6XX_RBBM_PERFCTR_HLSQ_0_LO 0x444 #define A6XX_RBBM_PERFCTR_HLSQ_0_HI 0x445 #define A6XX_RBBM_PERFCTR_HLSQ_1_LO 0x446 #define A6XX_RBBM_PERFCTR_HLSQ_1_HI 0x447 #define A6XX_RBBM_PERFCTR_HLSQ_2_LO 0x448 #define A6XX_RBBM_PERFCTR_HLSQ_2_HI 0x449 #define A6XX_RBBM_PERFCTR_HLSQ_3_LO 0x44a #define A6XX_RBBM_PERFCTR_HLSQ_3_HI 0x44b #define A6XX_RBBM_PERFCTR_HLSQ_4_LO 0x44c #define A6XX_RBBM_PERFCTR_HLSQ_4_HI 0x44d #define A6XX_RBBM_PERFCTR_HLSQ_5_LO 0x44e #define A6XX_RBBM_PERFCTR_HLSQ_5_HI 0x44f #define A6XX_RBBM_PERFCTR_VPC_0_LO 0x450 #define A6XX_RBBM_PERFCTR_VPC_0_HI 0x451 #define A6XX_RBBM_PERFCTR_VPC_1_LO 0x452 #define A6XX_RBBM_PERFCTR_VPC_1_HI 0x453 #define A6XX_RBBM_PERFCTR_VPC_2_LO 0x454 #define A6XX_RBBM_PERFCTR_VPC_2_HI 0x455 #define A6XX_RBBM_PERFCTR_VPC_3_LO 0x456 #define A6XX_RBBM_PERFCTR_VPC_3_HI 0x457 #define A6XX_RBBM_PERFCTR_VPC_4_LO 0x458 #define A6XX_RBBM_PERFCTR_VPC_4_HI 0x459 #define A6XX_RBBM_PERFCTR_VPC_5_LO 0x45a #define A6XX_RBBM_PERFCTR_VPC_5_HI 0x45b #define A6XX_RBBM_PERFCTR_CCU_0_LO 0x45c #define A6XX_RBBM_PERFCTR_CCU_0_HI 0x45d #define A6XX_RBBM_PERFCTR_CCU_1_LO 0x45e #define A6XX_RBBM_PERFCTR_CCU_1_HI 0x45f #define A6XX_RBBM_PERFCTR_CCU_2_LO 0x460 #define A6XX_RBBM_PERFCTR_CCU_2_HI 0x461 #define A6XX_RBBM_PERFCTR_CCU_3_LO 0x462 #define A6XX_RBBM_PERFCTR_CCU_3_HI 0x463 #define A6XX_RBBM_PERFCTR_CCU_4_LO 0x464 #define A6XX_RBBM_PERFCTR_CCU_4_HI 0x465 #define A6XX_RBBM_PERFCTR_TSE_0_LO 0x466 #define A6XX_RBBM_PERFCTR_TSE_0_HI 0x467 #define A6XX_RBBM_PERFCTR_TSE_1_LO 0x468 #define A6XX_RBBM_PERFCTR_TSE_1_HI 0x469 #define A6XX_RBBM_PERFCTR_TSE_2_LO 0x46a #define A6XX_RBBM_PERFCTR_CCU_4_HI 0x465 #define A6XX_RBBM_PERFCTR_TSE_0_LO 0x466 #define A6XX_RBBM_PERFCTR_TSE_0_HI 0x467 #define A6XX_RBBM_PERFCTR_TSE_1_LO 0x468 #define A6XX_RBBM_PERFCTR_TSE_1_HI 0x469 #define A6XX_RBBM_PERFCTR_TSE_2_LO 0x46a #define A6XX_RBBM_PERFCTR_TSE_2_HI 0x46b #define A6XX_RBBM_PERFCTR_TSE_3_LO 0x46c #define A6XX_RBBM_PERFCTR_TSE_3_HI 0x46d #define A6XX_RBBM_PERFCTR_RAS_0_LO 0x46e #define A6XX_RBBM_PERFCTR_RAS_0_HI 0x46f #define A6XX_RBBM_PERFCTR_RAS_1_LO 0x470 #define A6XX_RBBM_PERFCTR_RAS_1_HI 0x471 #define A6XX_RBBM_PERFCTR_RAS_2_LO 0x472 #define A6XX_RBBM_PERFCTR_RAS_2_HI 0x473 #define A6XX_RBBM_PERFCTR_RAS_3_LO 0x474 #define A6XX_RBBM_PERFCTR_RAS_3_HI 0x475 #define A6XX_RBBM_PERFCTR_UCHE_0_LO 0x476 #define A6XX_RBBM_PERFCTR_UCHE_0_HI 0x477 #define A6XX_RBBM_PERFCTR_UCHE_1_LO 0x478 #define A6XX_RBBM_PERFCTR_UCHE_1_HI 0x479 #define A6XX_RBBM_PERFCTR_UCHE_2_LO 0x47a #define A6XX_RBBM_PERFCTR_UCHE_2_HI 0x47b #define A6XX_RBBM_PERFCTR_UCHE_3_LO 0x47c #define A6XX_RBBM_PERFCTR_UCHE_3_HI 0x47d #define A6XX_RBBM_PERFCTR_UCHE_4_LO 0x47e #define A6XX_RBBM_PERFCTR_UCHE_4_HI 0x47f #define A6XX_RBBM_PERFCTR_UCHE_5_LO 0x480 #define A6XX_RBBM_PERFCTR_UCHE_5_HI 0x481 #define A6XX_RBBM_PERFCTR_UCHE_6_LO 0x482 #define A6XX_RBBM_PERFCTR_UCHE_6_HI 0x483 #define A6XX_RBBM_PERFCTR_UCHE_7_LO 0x484 #define A6XX_RBBM_PERFCTR_UCHE_7_HI 0x485 #define A6XX_RBBM_PERFCTR_UCHE_8_LO 0x486 #define A6XX_RBBM_PERFCTR_UCHE_8_HI 0x487 #define A6XX_RBBM_PERFCTR_UCHE_9_LO 0x488 #define A6XX_RBBM_PERFCTR_UCHE_9_HI 0x489 #define A6XX_RBBM_PERFCTR_UCHE_10_LO 0x48a #define A6XX_RBBM_PERFCTR_UCHE_10_HI 0x48b #define A6XX_RBBM_PERFCTR_UCHE_11_LO 0x48c #define A6XX_RBBM_PERFCTR_UCHE_11_HI 0x48d #define A6XX_RBBM_PERFCTR_TP_0_LO 0x48e #define A6XX_RBBM_PERFCTR_TP_0_HI 0x48f #define A6XX_RBBM_PERFCTR_TP_1_LO 0x490 #define A6XX_RBBM_PERFCTR_TP_1_HI 0x491 #define A6XX_RBBM_PERFCTR_TP_2_LO 0x492 #define A6XX_RBBM_PERFCTR_TP_2_HI 0x493 #define A6XX_RBBM_PERFCTR_TP_3_LO 0x494 #define A6XX_RBBM_PERFCTR_TP_3_HI 0x495 #define A6XX_RBBM_PERFCTR_TP_4_LO 0x496 #define A6XX_RBBM_PERFCTR_TP_4_HI 0x497 #define A6XX_RBBM_PERFCTR_TP_5_LO 0x498 #define A6XX_RBBM_PERFCTR_TP_5_HI 0x499 #define A6XX_RBBM_PERFCTR_TP_6_LO 0x49a #define A6XX_RBBM_PERFCTR_TP_6_HI 0x49b #define A6XX_RBBM_PERFCTR_TP_7_LO 0x49c #define A6XX_RBBM_PERFCTR_TP_7_HI 0x49d #define A6XX_RBBM_PERFCTR_TP_8_LO 0x49e #define A6XX_RBBM_PERFCTR_TP_8_HI 0x49f #define A6XX_RBBM_PERFCTR_TP_9_LO 0x4a0 #define A6XX_RBBM_PERFCTR_TP_9_HI 0x4a1 #define A6XX_RBBM_PERFCTR_TP_10_LO 0x4a2 #define A6XX_RBBM_PERFCTR_TP_10_HI 0x4a3 #define A6XX_RBBM_PERFCTR_TP_11_LO 0x4a4 #define A6XX_RBBM_PERFCTR_TP_11_HI 0x4a5 #define A6XX_RBBM_PERFCTR_SP_0_LO 0x4a6 #define A6XX_RBBM_PERFCTR_SP_0_HI 0x4a7 #define A6XX_RBBM_PERFCTR_SP_1_LO 0x4a8 #define A6XX_RBBM_PERFCTR_SP_1_HI 0x4a9 #define A6XX_RBBM_PERFCTR_SP_2_LO 0x4aa #define A6XX_RBBM_PERFCTR_SP_2_HI 0x4ab #define A6XX_RBBM_PERFCTR_SP_3_LO 0x4ac #define A6XX_RBBM_PERFCTR_SP_3_HI 0x4ad #define A6XX_RBBM_PERFCTR_SP_4_LO 0x4ae #define A6XX_RBBM_PERFCTR_SP_4_HI 0x4af #define A6XX_RBBM_PERFCTR_SP_5_LO 0x4b0 #define A6XX_RBBM_PERFCTR_SP_5_HI 0x4b1 #define A6XX_RBBM_PERFCTR_SP_6_LO 0x4b2 #define A6XX_RBBM_PERFCTR_SP_6_HI 0x4b3 #define A6XX_RBBM_PERFCTR_SP_7_LO 0x4b4 #define A6XX_RBBM_PERFCTR_SP_7_HI 0x4b5 #define A6XX_RBBM_PERFCTR_SP_8_LO 0x4b6 #define A6XX_RBBM_PERFCTR_SP_8_HI 0x4b7 #define A6XX_RBBM_PERFCTR_SP_9_LO 0x4b8 #define A6XX_RBBM_PERFCTR_SP_9_HI 0x4b9 #define A6XX_RBBM_PERFCTR_SP_10_LO 0x4ba #define A6XX_RBBM_PERFCTR_SP_10_HI 0x4bb #define A6XX_RBBM_PERFCTR_SP_11_LO 0x4bc #define A6XX_RBBM_PERFCTR_SP_11_HI 0x4bd #define A6XX_RBBM_PERFCTR_SP_12_LO 0x4be #define A6XX_RBBM_PERFCTR_SP_12_HI 0x4bf #define A6XX_RBBM_PERFCTR_SP_13_LO 0x4c0 #define A6XX_RBBM_PERFCTR_SP_13_HI 0x4c1 #define A6XX_RBBM_PERFCTR_SP_14_LO 0x4c2 #define A6XX_RBBM_PERFCTR_SP_14_HI 0x4c3 #define A6XX_RBBM_PERFCTR_SP_15_LO 0x4c4 #define A6XX_RBBM_PERFCTR_SP_15_HI 0x4c5 #define A6XX_RBBM_PERFCTR_SP_16_LO 0x4c6 #define A6XX_RBBM_PERFCTR_SP_16_HI 0x4c7 #define A6XX_RBBM_PERFCTR_SP_17_LO 0x4c8 #define A6XX_RBBM_PERFCTR_SP_17_HI 0x4c9 #define A6XX_RBBM_PERFCTR_SP_18_LO 0x4ca #define A6XX_RBBM_PERFCTR_SP_18_HI 0x4cb #define A6XX_RBBM_PERFCTR_SP_19_LO 0x4cc #define A6XX_RBBM_PERFCTR_SP_19_HI 0x4cd #define A6XX_RBBM_PERFCTR_SP_20_LO 0x4ce #define A6XX_RBBM_PERFCTR_SP_20_HI 0x4cf #define A6XX_RBBM_PERFCTR_SP_21_LO 0x4d0 #define A6XX_RBBM_PERFCTR_SP_21_HI 0x4d1 #define A6XX_RBBM_PERFCTR_SP_22_LO 0x4d2 #define A6XX_RBBM_PERFCTR_SP_22_HI 0x4d3 #define A6XX_RBBM_PERFCTR_SP_23_LO 0x4d4 #define A6XX_RBBM_PERFCTR_SP_23_HI 0x4d5 #define A6XX_RBBM_PERFCTR_RB_0_LO 0x4d6 #define A6XX_RBBM_PERFCTR_RB_0_HI 0x4d7 #define A6XX_RBBM_PERFCTR_RB_1_LO 0x4d8 #define A6XX_RBBM_PERFCTR_RB_1_HI 0x4d9 #define A6XX_RBBM_PERFCTR_RB_2_LO 0x4da #define A6XX_RBBM_PERFCTR_RB_2_HI 0x4db #define A6XX_RBBM_PERFCTR_RB_3_LO 0x4dc #define A6XX_RBBM_PERFCTR_RB_3_HI 0x4dd #define A6XX_RBBM_PERFCTR_RB_4_LO 0x4de #define A6XX_RBBM_PERFCTR_RB_4_HI 0x4df #define A6XX_RBBM_PERFCTR_RB_5_LO 0x4e0 #define A6XX_RBBM_PERFCTR_RB_5_HI 0x4e1 #define A6XX_RBBM_PERFCTR_RB_6_LO 0x4e2 #define A6XX_RBBM_PERFCTR_RB_6_HI 0x4e3 #define A6XX_RBBM_PERFCTR_RB_7_LO 0x4e4 #define A6XX_RBBM_PERFCTR_RB_7_HI 0x4e5 #define A6XX_RBBM_PERFCTR_VSC_0_LO 0x4e6 #define A6XX_RBBM_PERFCTR_VSC_0_HI 0x4e7 #define A6XX_RBBM_PERFCTR_VSC_1_LO 0x4e8 #define A6XX_RBBM_PERFCTR_VSC_1_HI 0x4e9 #define A6XX_RBBM_PERFCTR_LRZ_0_LO 0x4ea #define A6XX_RBBM_PERFCTR_LRZ_0_HI 0x4eb #define A6XX_RBBM_PERFCTR_LRZ_1_LO 0x4ec #define A6XX_RBBM_PERFCTR_LRZ_1_HI 0x4ed #define A6XX_RBBM_PERFCTR_LRZ_2_LO 0x4ee #define A6XX_RBBM_PERFCTR_LRZ_2_HI 0x4ef #define A6XX_RBBM_PERFCTR_LRZ_3_LO 0x4f0 #define A6XX_RBBM_PERFCTR_LRZ_3_HI 0x4f1 #define A6XX_RBBM_PERFCTR_CMP_0_LO 0x4f2 #define A6XX_RBBM_PERFCTR_CMP_0_HI 0x4f3 #define A6XX_RBBM_PERFCTR_CMP_1_LO 0x4f4 #define A6XX_RBBM_PERFCTR_CMP_1_HI 0x4f5 #define A6XX_RBBM_PERFCTR_CMP_2_LO 0x4f6 #define A6XX_RBBM_PERFCTR_CMP_2_HI 0x4f7 #define A6XX_RBBM_PERFCTR_CMP_3_LO 0x4f8 #define A6XX_RBBM_PERFCTR_CMP_3_HI 0x4f9 #define A6XX_RBBM_PERFCTR_CNTL 0x500 #define A6XX_RBBM_PERFCTR_LOAD_CMD0 0x501 #define A6XX_RBBM_PERFCTR_LOAD_CMD1 0x502 #define A6XX_RBBM_PERFCTR_LOAD_CMD2 0x503 #define A6XX_RBBM_PERFCTR_LOAD_CMD3 0x504 #define A6XX_RBBM_PERFCTR_LOAD_VALUE_LO 0x505 #define A6XX_RBBM_PERFCTR_LOAD_VALUE_HI 0x506 #define A6XX_RBBM_PERFCTR_RBBM_SEL_0 0x507 #define A6XX_RBBM_PERFCTR_RBBM_SEL_1 0x508 #define A6XX_RBBM_PERFCTR_RBBM_SEL_2 0x509 #define A6XX_RBBM_PERFCTR_RBBM_SEL_3 0x50A #define A6XX_RBBM_SECVID_TRUST_CNTL 0xF400 #define A6XX_RBBM_SECVID_TSB_ADDR_MODE_CNTL 0xF810 Loading Loading @@ -154,26 +436,87 @@ #define A6XX_DBGC_CFG_DBGBUS_TRACE_BUF2 0x630 /* VSC registers */ #define A6XX_VSC_PERFCTR_VSC_SEL_0 0xCD8 #define A6XX_VSC_PERFCTR_VSC_SEL_1 0xCD9 /* GRAS registers */ #define A6XX_GRAS_ADDR_MODE_CNTL 0x8601 #define A6XX_GRAS_PERFCTR_TSE_SEL_0 0x8610 #define A6XX_GRAS_PERFCTR_TSE_SEL_1 0x8611 #define A6XX_GRAS_PERFCTR_TSE_SEL_2 0x8612 #define A6XX_GRAS_PERFCTR_TSE_SEL_3 0x8613 #define A6XX_GRAS_PERFCTR_RAS_SEL_0 0x8614 #define A6XX_GRAS_PERFCTR_RAS_SEL_1 0x8615 #define A6XX_GRAS_PERFCTR_RAS_SEL_2 0x8616 #define A6XX_GRAS_PERFCTR_RAS_SEL_3 0x8617 #define A6XX_GRAS_PERFCTR_LRZ_SEL_0 0x8618 #define A6XX_GRAS_PERFCTR_LRZ_SEL_1 0x8619 #define A6XX_GRAS_PERFCTR_LRZ_SEL_2 0x861A #define A6XX_GRAS_PERFCTR_LRZ_SEL_3 0x861B /* RB registers */ #define A6XX_RB_ADDR_MODE_CNTL 0x8E05 #define A6XX_RB_NC_MODE_CNTL 0x8E08 #define A6XX_RB_PERFCTR_RB_SEL_0 0x8E10 #define A6XX_RB_PERFCTR_RB_SEL_1 0x8E11 #define A6XX_RB_PERFCTR_RB_SEL_2 0x8E12 #define A6XX_RB_PERFCTR_RB_SEL_3 0x8E13 #define A6XX_RB_PERFCTR_RB_SEL_4 0x8E14 #define A6XX_RB_PERFCTR_RB_SEL_5 0x8E15 #define A6XX_RB_PERFCTR_RB_SEL_6 0x8E16 #define A6XX_RB_PERFCTR_RB_SEL_7 0x8E17 #define A6XX_RB_PERFCTR_CCU_SEL_0 0x8E18 #define A6XX_RB_PERFCTR_CCU_SEL_1 0x8E19 #define A6XX_RB_PERFCTR_CCU_SEL_2 0x8E1A #define A6XX_RB_PERFCTR_CCU_SEL_3 0x8E1B #define A6XX_RB_PERFCTR_CCU_SEL_4 0x8E1C #define A6XX_RB_PERFCTR_CMP_SEL_0 0x8E2C #define A6XX_RB_PERFCTR_CMP_SEL_1 0x8E2D #define A6XX_RB_PERFCTR_CMP_SEL_2 0x8E2E #define A6XX_RB_PERFCTR_CMP_SEL_3 0x8E2F /* PC registers */ #define A6XX_PC_DBG_ECO_CNTL 0x9E00 #define A6XX_PC_ADDR_MODE_CNTL 0x9E01 #define A6XX_PC_PERFCTR_PC_SEL_0 0x9E34 #define A6XX_PC_PERFCTR_PC_SEL_1 0x9E35 #define A6XX_PC_PERFCTR_PC_SEL_2 0x9E36 #define A6XX_PC_PERFCTR_PC_SEL_3 0x9E37 #define A6XX_PC_PERFCTR_PC_SEL_4 0x9E38 #define A6XX_PC_PERFCTR_PC_SEL_5 0x9E39 #define A6XX_PC_PERFCTR_PC_SEL_6 0x9E3A #define A6XX_PC_PERFCTR_PC_SEL_7 0x9E3B /* HLSQ registers */ #define A6XX_HLSQ_ADDR_MODE_CNTL 0xBE05 #define A6XX_HLSQ_PERFCTR_HLSQ_SEL_0 0xBE10 #define A6XX_HLSQ_PERFCTR_HLSQ_SEL_1 0xBE11 #define A6XX_HLSQ_PERFCTR_HLSQ_SEL_2 0xBE12 #define A6XX_HLSQ_PERFCTR_HLSQ_SEL_3 0xBE13 #define A6XX_HLSQ_PERFCTR_HLSQ_SEL_4 0xBE14 #define A6XX_HLSQ_PERFCTR_HLSQ_SEL_5 0xBE15 #define A6XX_HLSQ_DBG_AHB_READ_APERTURE 0xC800 #define A6XX_HLSQ_DBG_READ_SEL 0xD000 /* VFD registers */ #define A6XX_VFD_ADDR_MODE_CNTL 0xA601 #define A6XX_VFD_PERFCTR_VFD_SEL_0 0xA610 #define A6XX_VFD_PERFCTR_VFD_SEL_1 0xA611 #define A6XX_VFD_PERFCTR_VFD_SEL_2 0xA612 #define A6XX_VFD_PERFCTR_VFD_SEL_3 0xA613 #define A6XX_VFD_PERFCTR_VFD_SEL_4 0xA614 #define A6XX_VFD_PERFCTR_VFD_SEL_5 0xA615 #define A6XX_VFD_PERFCTR_VFD_SEL_6 0xA616 #define A6XX_VFD_PERFCTR_VFD_SEL_7 0xA617 /* VPC registers */ #define A6XX_VPC_ADDR_MODE_CNTL 0x9601 #define A6XX_VPC_PERFCTR_VPC_SEL_0 0x9604 #define A6XX_VPC_PERFCTR_VPC_SEL_1 0x9605 #define A6XX_VPC_PERFCTR_VPC_SEL_2 0x9606 #define A6XX_VPC_PERFCTR_VPC_SEL_3 0x9607 #define A6XX_VPC_PERFCTR_VPC_SEL_4 0x9608 #define A6XX_VPC_PERFCTR_VPC_SEL_5 0x9609 /* UCHE registers */ #define A6XX_UCHE_ADDR_MODE_CNTL 0xE00 Loading @@ -190,20 +533,89 @@ #define A6XX_UCHE_GMEM_RANGE_MAX_HI 0xE0E #define A6XX_UCHE_CACHE_WAYS 0xE17 #define A6XX_UCHE_FILTER_CNTL 0xE18 #define A6XX_UCHE_PERFCTR_UCHE_SEL_0 0xE1C #define A6XX_UCHE_PERFCTR_UCHE_SEL_1 0xE1D #define A6XX_UCHE_PERFCTR_UCHE_SEL_2 0xE1E #define A6XX_UCHE_PERFCTR_UCHE_SEL_3 0xE1F #define A6XX_UCHE_PERFCTR_UCHE_SEL_4 0xE20 #define A6XX_UCHE_PERFCTR_UCHE_SEL_5 0xE21 #define A6XX_UCHE_PERFCTR_UCHE_SEL_6 0xE22 #define A6XX_UCHE_PERFCTR_UCHE_SEL_7 0xE23 #define A6XX_UCHE_PERFCTR_UCHE_SEL_8 0xE24 #define A6XX_UCHE_PERFCTR_UCHE_SEL_9 0xE25 #define A6XX_UCHE_PERFCTR_UCHE_SEL_10 0xE26 #define A6XX_UCHE_PERFCTR_UCHE_SEL_11 0xE27 /* SP registers */ #define A6XX_SP_ADDR_MODE_CNTL 0xAE01 #define A6XX_SP_NC_MODE_CNTL 0xAE02 #define A6XX_SP_PERFCTR_SP_SEL_0 0xAE10 #define A6XX_SP_PERFCTR_SP_SEL_1 0xAE11 #define A6XX_SP_PERFCTR_SP_SEL_2 0xAE12 #define A6XX_SP_PERFCTR_SP_SEL_3 0xAE13 #define A6XX_SP_PERFCTR_SP_SEL_4 0xAE14 #define A6XX_SP_PERFCTR_SP_SEL_5 0xAE15 #define A6XX_SP_PERFCTR_SP_SEL_6 0xAE16 #define A6XX_SP_PERFCTR_SP_SEL_7 0xAE17 #define A6XX_SP_PERFCTR_SP_SEL_8 0xAE18 #define A6XX_SP_PERFCTR_SP_SEL_9 0xAE19 #define A6XX_SP_PERFCTR_SP_SEL_10 0xAE1A #define A6XX_SP_PERFCTR_SP_SEL_11 0xAE1B #define A6XX_SP_PERFCTR_SP_SEL_12 0xAE1C #define A6XX_SP_PERFCTR_SP_SEL_13 0xAE1D #define A6XX_SP_PERFCTR_SP_SEL_14 0xAE1E #define A6XX_SP_PERFCTR_SP_SEL_15 0xAE1F #define A6XX_SP_PERFCTR_SP_SEL_16 0xAE20 #define A6XX_SP_PERFCTR_SP_SEL_17 0xAE21 #define A6XX_SP_PERFCTR_SP_SEL_18 0xAE22 #define A6XX_SP_PERFCTR_SP_SEL_19 0xAE23 #define A6XX_SP_PERFCTR_SP_SEL_20 0xAE24 #define A6XX_SP_PERFCTR_SP_SEL_21 0xAE25 #define A6XX_SP_PERFCTR_SP_SEL_22 0xAE26 #define A6XX_SP_PERFCTR_SP_SEL_23 0xAE27 /* TP registers */ #define A6XX_TPL1_ADDR_MODE_CNTL 0xB601 #define A6XX_TPL1_NC_MODE_CNTL 0xB604 #define A6XX_TPL1_PERFCTR_TP_SEL_0 0xB610 #define A6XX_TPL1_PERFCTR_TP_SEL_1 0xB611 #define A6XX_TPL1_PERFCTR_TP_SEL_2 0xB612 #define A6XX_TPL1_PERFCTR_TP_SEL_3 0xB613 #define A6XX_TPL1_PERFCTR_TP_SEL_4 0xB614 #define A6XX_TPL1_PERFCTR_TP_SEL_5 0xB615 #define A6XX_TPL1_PERFCTR_TP_SEL_6 0xB616 #define A6XX_TPL1_PERFCTR_TP_SEL_7 0xB617 #define A6XX_TPL1_PERFCTR_TP_SEL_8 0xB618 #define A6XX_TPL1_PERFCTR_TP_SEL_9 0xB619 #define A6XX_TPL1_PERFCTR_TP_SEL_10 0xB61A #define A6XX_TPL1_PERFCTR_TP_SEL_11 0xB61B /* VBIF registers */ #define A6XX_VBIF_VERSION 0x3000 #define A6XX_VBIF_GATE_OFF_WRREQ_EN 0x302A #define A6XX_VBIF_XIN_HALT_CTRL0 0x3080 #define A6XX_VBIF_XIN_HALT_CTRL1 0x3081 #define A6XX_VBIF_PERF_CNT_SEL0 0x30d0 #define A6XX_VBIF_PERF_CNT_SEL1 0x30d1 #define A6XX_VBIF_PERF_CNT_SEL2 0x30d2 #define A6XX_VBIF_PERF_CNT_SEL3 0x30d3 #define A6XX_VBIF_PERF_CNT_LOW0 0x30d8 #define A6XX_VBIF_PERF_CNT_LOW1 0x30d9 #define A6XX_VBIF_PERF_CNT_LOW2 0x30da #define A6XX_VBIF_PERF_CNT_LOW3 0x30db #define A6XX_VBIF_PERF_CNT_HIGH0 0x30e0 #define A6XX_VBIF_PERF_CNT_HIGH1 0x30e1 #define A6XX_VBIF_PERF_CNT_HIGH2 0x30e2 #define A6XX_VBIF_PERF_CNT_HIGH3 0x30e3 #define A6XX_VBIF_PERF_PWR_CNT_EN0 0x3100 #define A6XX_VBIF_PERF_PWR_CNT_EN1 0x3101 #define A6XX_VBIF_PERF_PWR_CNT_EN2 0x3102 #define A6XX_VBIF_PERF_PWR_CNT_LOW0 0x3110 #define A6XX_VBIF_PERF_PWR_CNT_LOW1 0x3111 #define A6XX_VBIF_PERF_PWR_CNT_LOW2 0x3112 #define A6XX_VBIF_PERF_PWR_CNT_HIGH0 0x3118 #define A6XX_VBIF_PERF_PWR_CNT_HIGH1 0x3119 #define A6XX_VBIF_PERF_PWR_CNT_HIGH2 0x311a /* GMU control registers */ #define A6XX_GMU_GX_SPTPRAC_POWER_CONTROL 0x1A881 Loading
drivers/gpu/msm/adreno_a6xx.c +375 −0 File changed.Preview size limit exceeded, changes collapsed. Show changes