Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit aefba081 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'upstream-linus' of master.kernel.org:/pub/scm/linux/kernel/git/jgarzik/libata-dev

* 'upstream-linus' of master.kernel.org:/pub/scm/linux/kernel/git/jgarzik/libata-dev:
  Revert "[PATCH] Add 0x7110 piix to ata_piix.c"
  [libata] sata_nv: Add PCI IDs
  [PATCH] ahci: fix status register check in ahci_softreset
parents 3ccfc65c 732f74a4
Loading
Loading
Loading
Loading
+1 −2
Original line number Diff line number Diff line
@@ -736,8 +736,7 @@ static int ahci_softreset(struct ata_port *ap, unsigned int *class)
	}

	/* check BUSY/DRQ, perform Command List Override if necessary */
	ahci_tf_read(ap, &tf);
	if (tf.command & (ATA_BUSY | ATA_DRQ)) {
	if (ahci_check_status(ap) & (ATA_BUSY | ATA_DRQ)) {
		rc = ahci_clo(ap);

		if (rc == -EOPNOTSUPP) {
+0 −1
Original line number Diff line number Diff line
@@ -168,7 +168,6 @@ static const struct pci_device_id piix_pci_tbl[] = {
#ifdef ATA_ENABLE_PATA
	/* Intel PIIX4 for the 430TX/440BX/MX chipset: UDMA 33 */
	/* Also PIIX4E (fn3 rev 2) and PIIX4M (fn3 rev 3) */
	{ 0x8086, 0x7110, PCI_ANY_ID, PCI_ANY_ID, 0, 0, piix_pata_33 },
	{ 0x8086, 0x7111, PCI_ANY_ID, PCI_ANY_ID, 0, 0, piix_pata_33 },
	{ 0x8086, 0x24db, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 },
	{ 0x8086, 0x25a2, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ich_pata_100 },
+8 −4
Original line number Diff line number Diff line
@@ -117,10 +117,14 @@ static const struct pci_device_id nv_pci_tbl[] = {
	{ PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_SATA), GENERIC },
	{ PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_SATA2), GENERIC },
	{ PCI_VDEVICE(NVIDIA, PCI_DEVICE_ID_NVIDIA_NFORCE_MCP61_SATA3), GENERIC },
	{ PCI_VDEVICE(NVIDIA, 0x045c), GENERIC },
	{ PCI_VDEVICE(NVIDIA, 0x045d), GENERIC },
	{ PCI_VDEVICE(NVIDIA, 0x045e), GENERIC },
	{ PCI_VDEVICE(NVIDIA, 0x045f), GENERIC },
	{ PCI_VDEVICE(NVIDIA, 0x045c), GENERIC }, /* MCP65 */
	{ PCI_VDEVICE(NVIDIA, 0x045d), GENERIC }, /* MCP65 */
	{ PCI_VDEVICE(NVIDIA, 0x045e), GENERIC }, /* MCP65 */
	{ PCI_VDEVICE(NVIDIA, 0x045f), GENERIC }, /* MCP65 */
	{ PCI_VDEVICE(NVIDIA, 0x0550), GENERIC }, /* MCP67 */
	{ PCI_VDEVICE(NVIDIA, 0x0551), GENERIC }, /* MCP67 */
	{ PCI_VDEVICE(NVIDIA, 0x0552), GENERIC }, /* MCP67 */
	{ PCI_VDEVICE(NVIDIA, 0x0553), GENERIC }, /* MCP67 */
	{ PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID,
		PCI_ANY_ID, PCI_ANY_ID,
		PCI_CLASS_STORAGE_IDE<<8, 0xffff00, GENERIC },